diff options
| author | Ed Swierk <eswierk@aristanetworks.com> | 2009-07-10 15:05:35 +0000 |
|---|---|---|
| committer | Ed Swierk <eswierk@arastra.com> | 2009-07-10 15:05:35 +0000 |
| commit | e42e142d9fc0048574664c3c92bdc1bbca35c9be (patch) | |
| tree | 07f78bdcdf580b1804434ec89973be77d1104d57 /src/cpu | |
| parent | 7d4fd2c1081a7674c0631cbe96aa23ca51879586 (diff) | |
Apparently I'm not the only one who forgets which way the outb and
outl arguments go.
Signed-off-by: Ed Swierk <eswierk@aristanetworks.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/sc520/raminit.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/amd/sc520/raminit.c b/src/cpu/amd/sc520/raminit.c index 1845c629c2..d20280761d 100644 --- a/src/cpu/amd/sc520/raminit.c +++ b/src/cpu/amd/sc520/raminit.c @@ -183,16 +183,16 @@ void setupsc520(void) /* Stepan says: This needs to go to the msm586seg code */ /* "enumerate" the PCI. Mainly set the interrupt bits on the PCnetFast. */ - outl(0xcf8, 0x08000683c); - outl(0xcfc, 0xc); /* set the interrupt line */ + outl(0x08000683c, 0xcf8); + outl(0xc, 0xcfc); /* set the interrupt line */ /* Set the SC520 PCI host bridge to target mode to * allow external bus mastering events */ /* index the status command register on device 0*/ - outl(0x0cf8,0x080000004); - outl(0xcfc, 0x2); /*set the memory access enable bit*/ + outl(0x080000004, 0x0cf8); + outl(0x2, 0xcfc); /*set the memory access enable bit*/ OUTC(0x0fffef072, 1); /* enable req bits in SYSARBMENB */ } |