diff options
| author | Martin Roth <martinroth@chromium.org> | 2021-06-21 09:18:46 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-25 15:51:20 +0000 |
| commit | 8a85a84fac7157927612cd638cf67c061d959bd8 (patch) | |
| tree | fec6ab28b277215fdbbe90df8b1a982870d0bc9d /src/cpu | |
| parent | b8bba6519ee0411010eaadc0589144d4fea4c67b (diff) | |
Asm code: Use NO_EARLY_BOOTBLOCK_POSTCODES to remove Asm port80s
Expand NO_EARLY_BOOTBLOCK_POSTCODES to all of the early assembly code in
bootblock.
BUG=b:191370340
TEST: Build with & without the option enabled
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Idb4a96820d5c391fc17a0f0dcccd519d4881b78c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55731
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/entry16.S | 2 | ||||
| -rw-r--r-- | src/cpu/x86/entry32.S | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/x86/entry16.S b/src/cpu/x86/entry16.S index 147906fe4d..d045c54937 100644 --- a/src/cpu/x86/entry16.S +++ b/src/cpu/x86/entry16.S @@ -43,9 +43,7 @@ _start16bit: cli /* Save the BIST result */ movl %eax, %ebp -#if !CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES) post_code(POST_RESET_VECTOR_CORRECT) -#endif /* IMMEDIATELY invalidate the translation lookaside buffer (TLB) before * executing any further code. Even though paging is disabled we diff --git a/src/cpu/x86/entry32.S b/src/cpu/x86/entry32.S index 639ab36a57..ad4a7d032b 100644 --- a/src/cpu/x86/entry32.S +++ b/src/cpu/x86/entry32.S @@ -31,9 +31,7 @@ bootblock_protected_mode_entry: /* Save the BIST value */ movl %eax, %ebp -#if !CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES) post_code(POST_ENTER_PROTECTED_MODE) -#endif movw $ROM_DATA_SEG, %ax movw %ax, %ds |