diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2012-02-13 13:38:27 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-03-17 09:38:31 +0100 |
| commit | 7a39446ec236b9eeba7454790fc32fc4240d7e42 (patch) | |
| tree | 2fd162f574ef122d8fbebe93e48e61c05049be86 /src/cpu | |
| parent | dd3b227fb9158c2fc84a916cac8de1d2ec103982 (diff) | |
Intel cpus: Include CAR from socket
It was not obvious which CAR was compiled in. Also build would fail
if a socket included two models with both having an include for CAR.
Change-Id: I000c2e24807c3d99347a43d120333c13fbf91af4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/626
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/model_6ex/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/socket_LGA771/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/cpu/intel/socket_mFCPGA478/Makefile.inc | 1 |
3 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/intel/model_6ex/Makefile.inc b/src/cpu/intel/model_6ex/Makefile.inc index 0053ae788c..cc4dc7b8ee 100644 --- a/src/cpu/intel/model_6ex/Makefile.inc +++ b/src/cpu/intel/model_6ex/Makefile.inc @@ -1,4 +1,3 @@ driver-y += model_6ex_init.c subdirs-y += ../../x86/name -cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc diff --git a/src/cpu/intel/socket_LGA771/Makefile.inc b/src/cpu/intel/socket_LGA771/Makefile.inc index 319430f930..ef520a3593 100644 --- a/src/cpu/intel/socket_LGA771/Makefile.inc +++ b/src/cpu/intel/socket_LGA771/Makefile.inc @@ -9,3 +9,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading +cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc diff --git a/src/cpu/intel/socket_mFCPGA478/Makefile.inc b/src/cpu/intel/socket_mFCPGA478/Makefile.inc index 74433a278a..29973af77a 100644 --- a/src/cpu/intel/socket_mFCPGA478/Makefile.inc +++ b/src/cpu/intel/socket_mFCPGA478/Makefile.inc @@ -12,3 +12,4 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading subdirs-y += ../speedstep +cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc |