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authorAngel Pons <th3fanbus@gmail.com>2021-06-22 15:18:07 +0200
committerAngel Pons <th3fanbus@gmail.com>2021-07-02 08:19:10 +0000
commit6f5a6581a61706b0b271ff16845fd0cefe46928b (patch)
tree53d856256dd67a3675f4f445245d4b0fe8f0672e /src/cpu
parentde62f55507b6ca4f98df3edd75b57e73814c1f2d (diff)
src: Introduce `ARCH_ALL_STAGES_X86`
Introduce the `ARCH_ALL_STAGES_X86` Kconfig symbol to automatically select the per-stage arch options. Subsequent commits will leverage this to allow choosing between 32-bit and 64-bit coreboot where all stages are x86. AMD Picasso and AMD Cezanne are the only exceptions to this rule: they disable `ARCH_ALL_STAGES_X86` and explicitly set the per-stage arch options accordingly. Change-Id: Ia2ddbae8c0dfb5301352d725032f6ebd370428c9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55759 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/agesa/Kconfig1
-rw-r--r--src/cpu/amd/pi/Kconfig1
-rw-r--r--src/cpu/intel/haswell/Kconfig1
-rw-r--r--src/cpu/intel/model_1067x/Kconfig1
-rw-r--r--src/cpu/intel/model_106cx/Kconfig1
-rw-r--r--src/cpu/intel/model_2065x/Kconfig1
-rw-r--r--src/cpu/intel/model_206ax/Kconfig1
-rw-r--r--src/cpu/intel/model_65x/Kconfig1
-rw-r--r--src/cpu/intel/model_67x/Kconfig1
-rw-r--r--src/cpu/intel/model_68x/Kconfig1
-rw-r--r--src/cpu/intel/model_6bx/Kconfig1
-rw-r--r--src/cpu/intel/model_6ex/Kconfig1
-rw-r--r--src/cpu/intel/model_6fx/Kconfig1
-rw-r--r--src/cpu/intel/model_6xx/Kconfig1
-rw-r--r--src/cpu/intel/model_f2x/Kconfig1
-rw-r--r--src/cpu/intel/model_f3x/Kconfig1
-rw-r--r--src/cpu/intel/model_f4x/Kconfig1
-rw-r--r--src/cpu/qemu-x86/Kconfig1
18 files changed, 0 insertions, 18 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index f71b8ede8b..15622c94e6 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -6,7 +6,6 @@ config CPU_AMD_AGESA
default y if CPU_AMD_AGESA_FAMILY15_TN
default y if CPU_AMD_AGESA_FAMILY16_KB
default n
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select DRIVERS_AMD_PI
select TSC_SYNC_LFENCE
diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig
index 4cc6902dee..aff8d7dc97 100644
--- a/src/cpu/amd/pi/Kconfig
+++ b/src/cpu/amd/pi/Kconfig
@@ -4,7 +4,6 @@ config CPU_AMD_PI
bool
default y if CPU_AMD_PI_00730F01
default n
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select DRIVERS_AMD_PI
select TSC_SYNC_LFENCE
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 1c91941181..9830305783 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -6,7 +6,6 @@ if CPU_INTEL_HASWELL
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select MMX
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 6ddb99ede4..a710e67acd 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_1067X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig
index 9f59b4711f..ac45cfafe2 100644
--- a/src/cpu/intel/model_106cx/Kconfig
+++ b/src/cpu/intel/model_106cx/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_106CX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index f539247dcf..731ea3743d 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -5,7 +5,6 @@ if CPU_INTEL_MODEL_2065X
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select SSE2
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index 9a0d792431..67fd701c35 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -10,7 +10,6 @@ config ARCH_EXP_X86_64
config CPU_SPECIFIC_OPTIONS
def_bool y
- select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64
select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64
select ARCH_X86
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig
index f9d123603d..6d41d94f57 100644
--- a/src/cpu/intel/model_65x/Kconfig
+++ b/src/cpu/intel/model_65x/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_65X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig
index 2fce135615..26a303be01 100644
--- a/src/cpu/intel/model_67x/Kconfig
+++ b/src/cpu/intel/model_67x/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_67X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig
index 67d4b775fd..796290770f 100644
--- a/src/cpu/intel/model_68x/Kconfig
+++ b/src/cpu/intel/model_68x/Kconfig
@@ -2,6 +2,5 @@
config CPU_INTEL_MODEL_68X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig
index 418f9bd658..14274a3236 100644
--- a/src/cpu/intel/model_6bx/Kconfig
+++ b/src/cpu/intel/model_6bx/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_6BX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig
index 240cee6e70..c7d54c5f8c 100644
--- a/src/cpu/intel/model_6ex/Kconfig
+++ b/src/cpu/intel/model_6ex/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_6EX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index 048178a81d..499972600a 100644
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_6FX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SSE2
select UDELAY_TSC
diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig
index eb2268a890..e05cf89517 100644
--- a/src/cpu/intel/model_6xx/Kconfig
+++ b/src/cpu/intel/model_6xx/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_6XX
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig
index e1708ba90a..672cf75517 100644
--- a/src/cpu/intel/model_f2x/Kconfig
+++ b/src/cpu/intel/model_f2x/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_F2X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
select SMM_ASEG
diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index 151a8e7509..b0a9f7ce64 100644
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -1,6 +1,5 @@
config CPU_INTEL_MODEL_F3X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_INTEL_COMMON
diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig
index 2d31655de3..550a978e85 100644
--- a/src/cpu/intel/model_f4x/Kconfig
+++ b/src/cpu/intel/model_f4x/Kconfig
@@ -1,5 +1,4 @@
config CPU_INTEL_MODEL_F4X
bool
- select ARCH_ALL_STAGES_X86_32
select ARCH_X86
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index 440d8cb4ae..6d897fe501 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -57,5 +57,4 @@ config CPU_QEMU_X86_32
bool
default n if CPU_QEMU_X86_64
default y
- select ARCH_ALL_STAGES_X86_32
endif