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authorSridhar Siricilla <sridhar.siricilla@intel.com>2022-10-26 16:18:35 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-10-28 01:38:21 +0000
commit6552b99fc990f4551d6677450441ce6451cfb082 (patch)
treee66e37158f8be0deb5050f0d560b52ce2e83a91d /src/cpu
parent75a4a6a40eaac85f26f6e184e5abb52e13c42ea8 (diff)
cpu/intel/common: Fix typecasting issue
The patch fixes the typecasting issue, that is conversion from 'int' to 'unsigned long long int'. This changes value from '0x8000 0000' to '0xFFFF FFFF 8000 0000'. During unit testing, the argument is getting changed to an unexpected number which is resulting to an exception when IA32_HWP_REQUEST MSR is updated. In this update, the MSR's reserved bits are getting updated, so this causes exception. TEST= Verified the code on the Gimble. No exception is seen after the fix. Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I35d382c792b9df260381b7696f3bbff43d6c4dc2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68899 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/common/common_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c
index 3a06281662..9da162d05d 100644
--- a/src/cpu/intel/common/common_init.c
+++ b/src/cpu/intel/common/common_init.c
@@ -225,5 +225,5 @@ void enable_energy_perf_pref(void)
void set_energy_perf_pref(u8 pref)
{
msr_unset_and_set(IA32_HWP_REQUEST, IA32_HWP_REQUEST_EPP_MASK,
- pref << IA32_HWP_REQUEST_EPP_SHIFT);
+ (uint64_t)pref << IA32_HWP_REQUEST_EPP_SHIFT);
}