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authorNico Huber <nico.h@gmx.de>2018-11-20 23:46:24 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-23 08:38:31 +0000
commit5a03ddcd91b282682935cc02bbf5ee0de3211364 (patch)
tree7eb7cf8be6d67e5c031257201997f878b45fc2a0 /src/cpu
parentd67edcae6e9d438f2e60f6b67d97a7d3f09cb18b (diff)
cpu/x86/Kconfig.debug: Move more options here
Gather x86 specific debug options and deflate their code a little. We keep their hiding rules and help texts, although they don't seem much useful. Change-Id: I3bb8e759fc6a4871d30fccff47babfb7a291b45c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29751 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/x86/Kconfig.debug24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/cpu/x86/Kconfig.debug b/src/cpu/x86/Kconfig.debug
index 2348231c58..c5e21efae1 100644
--- a/src/cpu/x86/Kconfig.debug
+++ b/src/cpu/x86/Kconfig.debug
@@ -1,6 +1,30 @@
+config HAVE_DEBUG_CAR
+ bool
+
+config DEBUG_CAR
+ bool
+ depends on HAVE_DEBUG_CAR
+ # Only visible if debug level is DEBUG (7) or SPEW (8) as it does
+ # additional printk(BIOS_DEBUG, ...) calls.
+ prompt "Output verbose Cache-as-RAM debug messages" \
+ if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
+ help
+ This option enables additional CAR related debug messages.
+
config HAVE_DISPLAY_MTRRS
bool
config DISPLAY_MTRRS
bool "Display intermediate MTRR settings"
depends on HAVE_DISPLAY_MTRRS
+
+config DEBUG_SMM_RELOCATION
+ bool "Debug SMM relocation code"
+ depends on HAVE_SMI_HANDLER
+ help
+ This option enables additional SMM handler relocation related
+ debug messages.
+
+ Note: This option will increase the size of the coreboot image.
+
+ If unsure, say N.