diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-11-24 14:12:07 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-05 22:27:31 +0100 |
| commit | 4e543d391592929d3d9a4d16cba7cec6696c8440 (patch) | |
| tree | 89cde30a739179a4628ea551d0ebdfbd596f3ec7 /src/cpu | |
| parent | fec8872c9dee4411ba1a89fc8ec833a700b476c6 (diff) | |
cpu/amd/fam10h-fam15h: Honor CMOS option to disable CPB (core boost)
On certain systems and CPUs Core Performance Boost (CPB) may cause
sporadic system lockups. This issue is also somewhat known on the
various proprietary BIOSes, therefore it seems to be a hardware
incompatibility when present.
Allow the user to disable CBP if needed.
Change-Id: Id6395d067d48963f6c084ad0bf79e23419af24d8
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13172
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/init_cpus.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index e2a1bf3688..c1ff24042d 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -987,6 +987,7 @@ void cpuSetAMDMSR(uint8_t node_id) u32 platform; uint64_t revision; uint8_t enable_c_states; + uint8_t enable_cpb; printk(BIOS_DEBUG, "cpuSetAMDMSR "); @@ -1078,6 +1079,19 @@ void cpuSetAMDMSR(uint8_t node_id) enable_c_states = 0; #endif + if (revision & AMD_FAM15_ALL) { + enable_cpb = 1; + if (get_option(&nvram, "cpu_core_boost") == CB_SUCCESS) + enable_cpb = !!nvram; + + if (!enable_cpb) { + /* Disable Core Performance Boost */ + msr = rdmsr(0xc0010015); + msr.lo |= (0x1 << 25); /* CpbDis = 1 */ + wrmsr(0xc0010015, msr); + } + } + printk(BIOS_DEBUG, " done\n"); } |