diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-05-27 10:03:10 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-04-21 12:30:47 +0000 |
| commit | 170d33dba4148acc627ebc9049fa2b6b3cf7f003 (patch) | |
| tree | 9e4650e71c0f82ce0264f1e4d2b112e1f7595038 /src/cpu | |
| parent | 80b686d4b2690d213a4041d8b533317045af69eb (diff) | |
cpu/x86/fpu_enable.inc: Remove file used by romcc
Change-Id: I530bb217bb9a944990232dcf4e08f160b5267512
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55008
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/fpu_enable.inc | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/src/cpu/x86/fpu_enable.inc b/src/cpu/x86/fpu_enable.inc deleted file mode 100644 index 28d2063b21..0000000000 --- a/src/cpu/x86/fpu_enable.inc +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -__fpu_start: - /* Preserve BIST. */ - movl %eax, %ebp - - /* - * Clear the CR0[2] bit (the "Emulation" flag, EM). - * - * This indicates that the processor has an (internal or external) - * x87 FPU, i.e. floating point operations will be executed by the - * hardware (and not emulated in software). - * - * Additionally, if this bit is not cleared, MMX/SSE instructions won't - * work, i.e., they will trigger an invalid opcode exception (#UD). - */ - movl %cr0, %eax - andl $~(1 << 2), %eax - movl %eax, %cr0 - - /* Restore BIST. */ - movl %ebp, %eax |