diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-29 01:02:03 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-24 12:01:24 +0000 |
| commit | f542b7bcef183ab26b194fa14a6a660eac4ae880 (patch) | |
| tree | a9de3da3dae7a8a3b287dc34b5d76c3290fb94b0 /src/cpu | |
| parent | 1c7ba62eb75186111bc72a4e6fc958ef09e078f7 (diff) | |
cpu/intel/haswell: Add Broadwell CPUIDs and microcode
Broadwell can now use the Haswell CPU driver.
Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46942
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/haswell/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/cpu/intel/haswell/haswell_init.c | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index b93b911aeb..3c4db4f1c8 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -23,3 +23,7 @@ subdirs-y += ../turbo cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*) cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*) + +ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) +cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin +endif diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 04f58026ae..577061c988 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -728,6 +728,10 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_HASWELL_ULT_C0 }, { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_B0 }, { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_C0 }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_C0 }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_C0 }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_D0 }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_E0 }, { 0, 0 }, }; |