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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-01-25 15:17:11 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-01-25 15:17:11 +0000
commite8d943f2668ab25d98ed61cd10d68353c4915f4b (patch)
treea0c06f4fd51833e66f813a46a6d92130183deb36 /src/cpu
parent3e4a0b87c84f82d4187ead100666e4d966c1fa45 (diff)
Fix ACPI build on a couple of boards (now that it's active)
Fix timer handling on amd/sc520 systems Match UDELAY_* configuration of newconfig in Kconfig Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/sc520/Kconfig4
-rw-r--r--src/cpu/intel/socket_PGA370/Kconfig1
-rw-r--r--src/cpu/intel/socket_mPGA604/Kconfig1
-rw-r--r--src/cpu/via/model_c3/Kconfig1
4 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/amd/sc520/Kconfig b/src/cpu/amd/sc520/Kconfig
index 6d3fa19017..82d892573b 100644
--- a/src/cpu/amd/sc520/Kconfig
+++ b/src/cpu/amd/sc520/Kconfig
@@ -6,3 +6,7 @@ config UDELAY_IO
default n
depends on CPU_AMD_SC520
+config HAVE_INIT_TIMER
+ bool
+ default n
+ depends on CPU_AMD_SC520
diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig
index 307b81355e..cd3ecd0107 100644
--- a/src/cpu/intel/socket_PGA370/Kconfig
+++ b/src/cpu/intel/socket_PGA370/Kconfig
@@ -21,3 +21,4 @@
config CPU_INTEL_SOCKET_PGA370
bool
select MMX
+ select UDELAY_TSC
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig
index 130d4b8c54..2668174e71 100644
--- a/src/cpu/intel/socket_mPGA604/Kconfig
+++ b/src/cpu/intel/socket_mPGA604/Kconfig
@@ -5,3 +5,4 @@ config CPU_INTEL_SOCKET_MPGA604
select CPU_INTEL_MODEL_F4X
select MMX
select SSE
+ select UDELAY_TSC
diff --git a/src/cpu/via/model_c3/Kconfig b/src/cpu/via/model_c3/Kconfig
index 2664d87d61..881243111a 100644
--- a/src/cpu/via/model_c3/Kconfig
+++ b/src/cpu/via/model_c3/Kconfig
@@ -1,2 +1,3 @@
config CPU_VIA_C3
bool
+ select UDELAY_TSC