diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-15 20:14:33 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-25 15:49:27 +0000 |
| commit | 99e578e3c1697028957f25efc7c14d1cb4d405dc (patch) | |
| tree | 44853df46744994d5caf3172a579f9d92252155b /src/cpu | |
| parent | c752c500fbcc055e8cdfb30a2e523e8a9349b79f (diff) | |
nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCK
This adds a file i82801gx/bootblock_gcc.c since other targets that
don't yet C_ENVIRONMENT_BOOTBLOCK still use the romcc compiled
bootblock.c.
Tested on Foxconn D41S.
Change-Id: I7e74838b0d5e9c192082084cfd9821996f0e4c50
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/socket_FCBGA559/Kconfig | 7 | ||||
| -rw-r--r-- | src/cpu/intel/socket_FCBGA559/Makefile.inc | 4 |
2 files changed, 10 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index b1b310d3cc..d3af4ca3cc 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -21,4 +21,11 @@ config DCACHE_RAM_SIZE hex default 0x4000 +config DCACHE_BSP_STACK_SIZE + hex + default 0x2000 + help + The amount of anticipated stack usage in CAR by bootblock and + other stages. + endif diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 868f6e5608..c95e135bb5 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -8,7 +8,9 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading subdirs-y += ../speedstep -cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S +bootblock-y += ../car/bootblock.c +bootblock-y += ../car/non-evict/cache_as_ram.S + postcar-y += ../car/non-evict/exit_car.S romstage-y += ../car/romstage.c |