diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-11 17:34:54 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-21 12:34:28 +0000 |
| commit | 63032439f4278125b3a01d33d056761dd1ae8cba (patch) | |
| tree | 58621ab2e80ad1f0bc75fc76c4740cdf46d1804c /src/cpu | |
| parent | 2ac743330c2668abae9eb1d5a01ad1b86ba918a9 (diff) | |
{cpu,soc}/intel: replace AES-NI locking by common implemenation call
Deduplicate code by using the new common cpu code implementation of
AES-NI locking.
Change-Id: I7ab2d3839ecb758335ef8cc6a0c0c7103db0fa50
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46278
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/model_2065x/model_2065x_init.c | 6 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 6 |
2 files changed, 2 insertions, 10 deletions
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index b4a91ea658..65b28c0a0e 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -216,11 +216,7 @@ static void model_2065x_init(struct device *cpu) /* Set virtualization based on Kconfig option */ set_vmx_and_lock(); - if (!intel_ht_sibling()) { - /* Lock AES-NI only if supported */ - if (cpuid_ecx(1) & (1 << 25)) - msr_set(MSR_FEATURE_CONFIG, BIT(0)); - } + set_aesni_lock(); /* Configure Enhanced SpeedStep and Thermal Sensors */ configure_misc(); diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index d23772a23f..5af5ff905e 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -470,11 +470,7 @@ static void model_206ax_init(struct device *cpu) /* Thermal throttle activation offset */ configure_thermal_target(); - if (!intel_ht_sibling()) { - /* Lock AES-NI only if supported */ - if (cpuid_ecx(1) & (1 << 25)) - msr_set(MSR_FEATURE_CONFIG, BIT(0)); - } + set_aesni_lock(); /* Enable Direct Cache Access */ configure_dca_cap(); |