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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-10-06 20:48:07 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-10-06 20:48:07 +0000
commit0e9a92545d0be44487f9bc5ad6ab26af5badf125 (patch)
tree5101a1f26ff39f4bce64d123ecf1f7055f9709a0 /src/cpu
parenta3d6ea8a737193e217be5d7003d827da215a7bab (diff)
Various fixes to Kconfig: All kconfig-boards should have a
complete set of variables now, though they might still have the wrong values. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/Kconfig11
-rw-r--r--src/cpu/intel/model_1067x/Kconfig2
-rw-r--r--src/cpu/x86/Kconfig8
3 files changed, 20 insertions, 1 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 54b0175882..ebe5dec07f 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -21,6 +21,10 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+
config SMP
bool
default y if MAX_CPUS != 1
@@ -39,3 +43,10 @@ config SSE
help
Set this in socket or model if the CPU has SSE.
If the CPUs for the socket always have MX, set it there.
+
+config VAR_MTRR_HOLE
+ bool
+ default y
+ help
+ Unset this if you don't want the MTRR code to use
+ subtractive MTRRs
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 55b5eb737b..43e7d7d77f 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -1,5 +1,5 @@
config CPU_INTEL_CORE2
bool
- default y
+ default n
select SMP
select HAVE_MOVNTI
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index b6ae9967e5..a3b9330e64 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -6,6 +6,14 @@ config WAIT_BEFORE_CPUS_INIT
bool
default n
+config UDELAY_IO
+ bool
+ default n
+
+config UDELAY_LAPIC
+ bool
+ default n
+
config UDELAY_TSC
bool
default n