diff options
author | Stefan Reinauer <stepan@coreboot.org> | 2011-01-12 21:09:25 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2011-01-12 21:09:25 +0000 |
commit | fb433bea6a886e8c00620bf4c799feae0d6c7072 (patch) | |
tree | d108a20f421d3052b9aee2cf8bb8f9dfcc0cf634 /src/cpu | |
parent | 09e0e9a68b589e1a23758e70dbee32cc4e4a2e5d (diff) |
drop unused files
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_01000020.h | 163 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_01000083.h | 165 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_01000084.h | 165 | ||||
-rw-r--r-- | src/cpu/intel/model_f0x/multiplier.h | 55 | ||||
-rw-r--r-- | src/cpu/intel/model_f1x/multiplier.h | 55 |
5 files changed, 0 insertions, 603 deletions
diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000020.h b/src/cpu/amd/model_10xxx/mc_patch_01000020.h deleted file mode 100644 index 0cf207d08b..0000000000 --- a/src/cpu/amd/model_10xxx/mc_patch_01000020.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - ============================================================ - (c) Advanced Micro Devices, Inc., 2004-2005 - - The enclosed microcode is intended to be used with AMD - Microprocessors. You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - -0x07, 0x20, 0x26, 0x03, 0x20, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x66, 0x68, 0x30, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, -0x00, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x44, 0x06, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0xa4, 0x06, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, -0x72, 0x09, 0x00, 0x00, 0x70, 0x09, 0x00, 0x00, 0x9b, 0x0b, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0xff, 0x81, 0x7f, 0x00, 0xc3, 0x3f, 0x80, 0x37, -0xfc, 0x07, 0xfe, 0x01, 0x0d, 0xff, 0x00, 0xfe, 0xf0, 0x1f, 0xf8, 0x07, -0x37, 0xfc, 0x03, 0xf8, 0xc0, 0xff, 0xf7, 0x00, 0x80, 0xff, 0xc0, 0x3f, -0x9b, 0xe1, 0x1f, 0xc0, 0x00, 0xfe, 0x03, 0xff, 0xff, 0x86, 0x7f, 0x00, -0x03, 0xf8, 0x0f, 0xfc, 0xfc, 0x1b, 0xfe, 0x01, 0x00, 0x40, 0x37, 0x6b, -0xff, 0xfb, 0xfd, 0xff, 0x57, 0x7d, 0xf0, 0xcd, 0xff, 0x1f, 0xb7, 0xfe, -0xc0, 0xcf, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - - -0x08, 0x20, 0x30, 0x04, 0x83, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0xA8, 0x88, 0x43, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x22, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x70, 0x09, 0x00, 0x00, -0x49, 0x01, 0x00, 0x00, 0x8B, 0x01, 0x00, 0x00, 0xC1, 0x08, 0x00, 0x00, -0xAA, 0x0B, 0x00, 0x00, 0x56, 0x0F, 0x00, 0x00, 0x9E, 0x0B, 0x00, 0x00, -0x70, 0x0C, 0x00, 0x00, 0x2A, 0xFF, 0xFF, 0x29, 0xC3, 0x5F, 0xD0, 0xC1, -0xBD, 0xFF, 0xFF, 0xB3, 0x0F, 0xFF, 0x7E, 0xFD, 0xF6, 0x1F, 0xF8, 0x57, -0x3C, 0xBC, 0x63, 0x2D, 0x80, 0x96, 0xD6, 0x00, 0xAA, 0xFF, 0xEF, 0xAF, -0xE0, 0xD1, 0x9F, 0x15, 0x57, 0xEF, 0xFF, 0xFF, 0xEA, 0x87, 0x7F, 0xBF, -0x03, 0xFA, 0x0F, 0xFC, 0xFC, 0x1F, 0xBE, 0xF5, 0x00, 0xE0, 0x4A, 0x4B, -0x7F, 0xC8, 0xFF, 0xF7, 0xB4, 0xF8, 0xF0, 0x2F, 0xFF, 0x1F, 0xC5, 0xFE, -0xC0, 0xCF, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - diff --git a/src/cpu/intel/model_f0x/multiplier.h b/src/cpu/intel/model_f0x/multiplier.h deleted file mode 100644 index a3b1fcb309..0000000000 --- a/src/cpu/intel/model_f0x/multiplier.h +++ /dev/null @@ -1,55 +0,0 @@ - -/* - ** NMI A20M IGNNE INTR - * X8 H H H H - * X9 H H H L projected - * X10 H H L H - * X11 H H L L - * X12 H L H H - * X13 H L H L - * X14 H L L H - * X15 H L L L - * X16 L H H H - * X17 L H H L - * X18 L H L H - * X19 L H L L - * X20 L L H H - * X21 L L H L projected - * X22 L L L H projected - * X23 L L L L projected - * - ** NMI INTR IGNNE A20M - * X8 H H H H - * X9 H L H H projected - * X10 H H L H - * X11 H L L H - * X12 H H H L - * X13 H L H L - * X14 H H L L - * X15 H L L L - * X16 L H H H - * X17 L L H H - * X18 L H L H - * X19 L L L H - * X20 L H H L - * X21 L L H L projected - * X22 L H L L projected - * X23 L L L L projected - */ - -#define XEON_X8 0xf -#define XEON_X9 0xb /* projected */ -#define XEON_X10 0xd -#define XEON_X11 0x9 -#define XEON_X12 0xe -#define XEON_X13 0xa -#define XEON_X14 0xc -#define XEON_X15 0x8 -#define XEON_X16 0x7 -#define XEON_X17 0x3 -#define XEON_X18 0x5 -#define XEON_X19 0x1 -#define XEON_X20 0x6 -#define XEON_X21 0x2 /* projected */ -#define XEON_X22 0x4 /* projected */ -#define XEON_X23 0x0 /* projected */ diff --git a/src/cpu/intel/model_f1x/multiplier.h b/src/cpu/intel/model_f1x/multiplier.h deleted file mode 100644 index a3b1fcb309..0000000000 --- a/src/cpu/intel/model_f1x/multiplier.h +++ /dev/null @@ -1,55 +0,0 @@ - -/* - ** NMI A20M IGNNE INTR - * X8 H H H H - * X9 H H H L projected - * X10 H H L H - * X11 H H L L - * X12 H L H H - * X13 H L H L - * X14 H L L H - * X15 H L L L - * X16 L H H H - * X17 L H H L - * X18 L H L H - * X19 L H L L - * X20 L L H H - * X21 L L H L projected - * X22 L L L H projected - * X23 L L L L projected - * - ** NMI INTR IGNNE A20M - * X8 H H H H - * X9 H L H H projected - * X10 H H L H - * X11 H L L H - * X12 H H H L - * X13 H L H L - * X14 H H L L - * X15 H L L L - * X16 L H H H - * X17 L L H H - * X18 L H L H - * X19 L L L H - * X20 L H H L - * X21 L L H L projected - * X22 L H L L projected - * X23 L L L L projected - */ - -#define XEON_X8 0xf -#define XEON_X9 0xb /* projected */ -#define XEON_X10 0xd -#define XEON_X11 0x9 -#define XEON_X12 0xe -#define XEON_X13 0xa -#define XEON_X14 0xc -#define XEON_X15 0x8 -#define XEON_X16 0x7 -#define XEON_X17 0x3 -#define XEON_X18 0x5 -#define XEON_X19 0x1 -#define XEON_X20 0x6 -#define XEON_X21 0x2 /* projected */ -#define XEON_X22 0x4 /* projected */ -#define XEON_X23 0x0 /* projected */ |