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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-15 06:15:46 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-17 00:22:10 +0200
commitd72cc4111b81497356b0cb5d4c305ae9e460a9b5 (patch)
treef27426f4bb9067d29426997089968b283c09d90a /src/cpu
parenta969ed34dbaebc595e298f60810669f0e8a3bcd2 (diff)
intel/model_206ax: Move platform specific defines
Change-Id: I3c517fc55dd333b1a457324f1d69aeb6f70acec2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15197 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/model_206ax/cache_as_ram.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/model_206ax/cache_as_ram.inc b/src/cpu/intel/model_206ax/cache_as_ram.inc
index 358ba75e04..56feab994e 100644
--- a/src/cpu/intel/model_206ax/cache_as_ram.inc
+++ b/src/cpu/intel/model_206ax/cache_as_ram.inc
@@ -17,8 +17,8 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/post_code.h>
-#include <cbmem.h>
#include <arch/acpi.h>
+#include "northbridge/intel/sandybridge/sandybridge.h"
#define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE
#define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE