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authorPatrick Rudolph <patrick.rudolph@9elements.com>2020-09-29 13:32:06 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-10-12 14:42:45 +0000
commit7a042229036c3dde2b443788389d6adfe1c1dd67 (patch)
treec0ccdc808ada64bc20bd8797b0fee2402f1e77ca /src/cpu
parente2983913373dd783f711b393e77682b8666283d1 (diff)
cpu/qemu-x86/cache_as_ram_bootblock: Fix wrong instruction
The shld instruction does an arithmetic shift left on 64bit operants, but it's not the instruction we want, because what it actually does is shifting by cl, and storing the result in address 32. This wasn't noticed with QEMU as the DRAM is up and address 32 is valid. On real hardware when CAR is running this instruction causes a crash. Replace the instruction with the correct 64bit arithmetic left shift. Change-Id: Iedad9f4b693b1ea05898456eac2050a9389f6f19 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45820 Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/qemu-x86/cache_as_ram_bootblock.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
index 148948ba31..197e0fd8e8 100644
--- a/src/cpu/qemu-x86/cache_as_ram_bootblock.S
+++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
@@ -33,7 +33,7 @@ cache_as_ram:
/* Restore the BIST result and timestamps. */
#if defined(__x86_64__)
movd %mm2, %rdi
- shld %rdi, 32
+ shlq $32, %rdi
movd %mm1, %rsi
or %rsi, %rdi