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authorDavid Hendricks <dhendrix@chromium.org>2013-08-05 21:09:32 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 22:45:52 +0100
commit792b621ac03cb0d0eab065374f912a103a7b4080 (patch)
tree3706808d81dc79fc40acc435d32808801ed53616 /src/cpu
parentf05e8713007fa61f20dfa39a5176f8d5427cd673 (diff)
exynos5420: init APLL at 1800MHz
This initializes the APLL at 1800MHz. Change-Id: I366bf4e75510847ab93d9c9f214a49c731cca08a Reviewed-on: https://gerrit.chromium.org/gerrit/64745 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4443 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/samsung/exynos5420/clock_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5420/clock_init.c b/src/cpu/samsung/exynos5420/clock_init.c
index b62ebe4822..352163619c 100644
--- a/src/cpu/samsung/exynos5420/clock_init.c
+++ b/src/cpu/samsung/exynos5420/clock_init.c
@@ -65,7 +65,7 @@ void system_clock_init(void)
/* Set APLL */
writel(APLL_CON1_VAL, &clk->apll_con1);
- val = set_pll(0xc8, 0x3, 0x1);
+ val = set_pll(225, 3, 0); /* FOUT=1800MHz */
writel(val, &clk->apll_con0);
while ((readl(&clk->apll_con0) & PLL_LOCKED) == 0)
;