diff options
| author | V Sowmya <v.sowmya@intel.com> | 2022-04-08 14:36:13 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-18 20:38:15 +0000 |
| commit | ee449451878ad41caa8724d6435f32c1af474d7b (patch) | |
| tree | 619b1cb810d65b10bb997a06e82a06981a9385bc /src/cpu | |
| parent | 2af96025fcde0727d7bc358c90cadbe07645e084 (diff) | |
soc/intel/alderlake: Add support enable external V1P05/Vnn rails
This patch adds the support to enable the external V1P05/Vnn rails
in S0 state via devicetree.
BUG=b:223102016
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I555e5607af15a5f5d83ef74321b1b71f17cca289
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63497
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/cpu')
0 files changed, 0 insertions, 0 deletions