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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-05-27 07:58:22 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-11-06 21:07:03 +0100
commited98e945c0c6938a26bff6d5b38932b2851d348a (patch)
treefe61a641a99f6b177320057a8e7775657c224961 /src/cpu
parent740edf4f958873ec8ff648ca5bd9e23d94903337 (diff)
amd/00730F01: Add correct CPU model
Change-Id: I887f9eb890f1f1c6f88b7984f0520bd17be8b88b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/12284 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/pi/00730F01/model_16_init.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c
index c088f47da0..00a21e962d 100644
--- a/src/cpu/amd/pi/00730F01/model_16_init.c
+++ b/src/cpu/amd/pi/00730F01/model_16_init.c
@@ -42,9 +42,6 @@ static void model_16_init(device_t dev)
u32 siblings;
#endif
- //x86_enable_cache();
- //amd_setup_mtrrs();
- //x86_mtrr_check();
disable_cache ();
/* Enable access to AMD RdDram and WrDram extension bits */
msr = rdmsr(SYSCFG_MSR);
@@ -115,7 +112,8 @@ static struct device_operations cpu_dev_ops = {
};
static struct cpu_device_id cpu_table[] = {
- { X86_VENDOR_AMD, 0x730f00 }, /* ML-A0, Guess, TODO: */
+ { X86_VENDOR_AMD, 0x730F00 },
+ { X86_VENDOR_AMD, 0x730F01 },
{ 0, 0 },
};