diff options
| author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-10-22 23:54:53 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-26 15:38:26 +0000 |
| commit | e2783daa84e16873c4ca2a4aa99e08420d7bd287 (patch) | |
| tree | 6b8ab0a1e26cd068bcdd23b84ce949130b7f19a3 /src/cpu | |
| parent | 8023eabde1dd3e830ee9a34437591070e60a1a75 (diff) | |
cpu/x86: Introduce `CPU_X86_CACHE_HELPER`
There's no need for relative paths with Kconfig options.
Change-Id: Ib9b9b29a158c34a30480aaabf6d0b23819d28427
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44226
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/cpu')
24 files changed, 18 insertions, 11 deletions
diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index 103903fc1e..e617c19c8a 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY14 bool select X86_AMD_FIXED_MTRRS + select CPU_X86_CACHE_HELPER if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index aeecbe4852..5ee0f82fe3 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -8,4 +8,3 @@ ramstage-y += model_14_init.c subdirs-y += ../../mtrr subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index 8c52e9a9b6..68fd82cd6e 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -4,6 +4,7 @@ config CPU_AMD_AGESA_FAMILY15_TN bool select IDS_OPTIONS_HOOKED_UP select X86_AMD_FIXED_MTRRS + select CPU_X86_CACHE_HELPER if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index 03aadd3d38..86d840bff2 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -11,4 +11,3 @@ smm-y += udelay.c subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index e41ddece4d..ee568ece65 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY16_KB bool select X86_AMD_FIXED_MTRRS + select CPU_X86_CACHE_HELPER if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index 7eb39e3394..1cc8eff9b2 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -8,4 +8,3 @@ ramstage-y += model_16_init.c subdirs-y += ../../mtrr subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index c30e066444..9cbe502654 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -12,6 +12,7 @@ config SLOT_SPECIFIC_OPTIONS select CPU_INTEL_MODEL_68X select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX + select CPU_X86_CACHE_HELPER select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index 28df10ea23..b2422f4957 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../model_67x subdirs-y += ../model_68x subdirs-y += ../model_6bx subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode bootblock-y += ../car/p3/cache_as_ram.S diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index 5b6ae7f61d..8df6fbd416 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -6,6 +6,7 @@ if CPU_INTEL_SOCKET_441 config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_CACHE_HELPER select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index dfed16c717..e338ea1836 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_106cx subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode subdirs-y += ../speedstep diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 638653c162..1cad83f43b 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -1,6 +1,7 @@ config CPU_INTEL_SOCKET_BGA956 bool select CPU_INTEL_MODEL_1067X + select CPU_X86_CACHE_HELPER select MMX select SSE diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index a39798449b..5f92919e17 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_1067x subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode subdirs-y += ../speedstep diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 5105f095e9..87c419fe48 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -8,6 +8,7 @@ if CPU_INTEL_SOCKET_FCBGA559 config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_CACHE_HELPER select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 64d0c36507..48ba3a95a2 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_106cx subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode subdirs-y += ../speedstep diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 0848d2648e..f162599e77 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -11,6 +11,7 @@ config SOCKET_SPECIFIC_OPTIONS # select CPU_INTEL_MODEL_F6X # select CPU_INTEL_MODEL_1066X select CPU_INTEL_MODEL_1067X + select CPU_X86_CACHE_HELPER select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index a16f670fca..1f1008e658 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../model_f4x #subdirs-y += ../model_1066x subdirs-y += ../model_1067x subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode subdirs-y += ../speedstep diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 50eb7e3f0c..d3d81c5676 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -7,6 +7,7 @@ config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX + select CPU_X86_CACHE_HELPER select MMX select SSE diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index 2bcd580abc..6c53ec2c5b 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -1,7 +1,6 @@ subdirs-y += ../model_6ex subdirs-y += ../model_6fx subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode subdirs-y += ../speedstep diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 7b086990f7..f95cd02f20 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -6,6 +6,7 @@ if CPU_INTEL_SOCKET_MPGA604 config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_F2X + select CPU_X86_CACHE_HELPER select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 2bca94ea2d..f9dfc67b0c 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_f2x subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode bootblock-y += ../car/p4-netburst/cache_as_ram.S diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index a7c8ab1bb8..9239fe71fd 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -2,6 +2,7 @@ config CPU_INTEL_SOCKET_P bool select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX + select CPU_X86_CACHE_HELPER select MMX select SSE diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 8588c37135..64bb8beaa6 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -1,7 +1,6 @@ subdirs-y += ../model_6fx subdirs-y += ../model_1067x subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../microcode subdirs-y += ../speedstep diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index fb5b5413b9..bae38891ad 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -1,3 +1,9 @@ +config CPU_X86_CACHE_HELPER + bool + default n + help + Add the x86_enable_cache ramstage helper function to the build. + config PARALLEL_MP def_bool y depends on !LEGACY_SMP_INIT diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 016b601411..05df6e0f92 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,3 +1,4 @@ +subdirs-$(CONFIG_CPU_X86_CACHE_HELPER) += cache subdirs-y += mtrr subdirs-y += pae subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm |