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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-14 19:30:51 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-20 07:24:41 +0100 |
commit | 94e796aae667bec0fdb1a6ed16b01d0174811b15 (patch) | |
tree | 0c97f4e63ae0d71c3babed0967cc38473a6a323f /src/cpu | |
parent | 25c27359d183e6bacf1a4a1a30efe0f3b75946f0 (diff) |
AGESA fam15: Unify agesawrapper
Disable TSC output for now.
Change-Id: I078b4f0170aaf0ada58e464cf609c234204f8196
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7822
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/agesa/family15/fixme.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/family15/fixme.c b/src/cpu/amd/agesa/family15/fixme.c index 666ebafea4..39a652e677 100644 --- a/src/cpu/amd/agesa/family15/fixme.c +++ b/src/cpu/amd/agesa/family15/fixme.c @@ -279,3 +279,18 @@ void amd_initmmio(void) MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull; LibAmdMsrWrite(0x20D, &MsrReg, &StdHeader); } + +#if 0 +#include <cpuFamilyTranslation.h> + +void cpu_show_tsc(void) +{ + UINT32 TscRateInMhz; + CPU_SPECIFIC_SERVICES *FamilySpecificServices; + + GetCpuServicesOfCurrentCore((CONST CPU_SPECIFIC_SERVICES **) & FamilySpecificServices, + &AmdParamStruct.StdHeader); + FamilySpecificServices->GetTscRate(FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); + printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); +} +#endif |