diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2023-01-11 16:36:12 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-10 20:01:22 +0000 |
| commit | 7be147dfaa2ddacbbc033e6758ca37229351110a (patch) | |
| tree | c2d59c4fe1553c84da6c69758a03cfd3193dbcb8 /src/cpu | |
| parent | 559f9ed58308bf777d72c98bc4d69cc620959ec6 (diff) | |
mp_init: Wait longer for APs to check in
On IBM/SBP1 with 384 cores it takes a while for all APs
to check in. Use linear scaling instead of hardcoding an
arbitrary limit for the timeout.
Change-Id: If020a3fa985bfc7fd2f0aa836dc04e6647a1a450
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: TangYiwei
Reviewed-by: Naresh <naresh.solanki.2011@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/mp_init.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 8c48f906e4..8301e80a22 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -432,7 +432,7 @@ static enum cb_err send_sipi_to_aps(int ap_count, atomic_t *num_aps, int sipi_ve static enum cb_err start_aps(struct bus *cpu_bus, int ap_count, atomic_t *num_aps) { - int sipi_vector; + int sipi_vector, total_delay; /* Max location is 4KiB below 1MiB */ const int max_vector_loc = ((1 << 20) - (1 << 12)) >> 12; @@ -479,7 +479,8 @@ static enum cb_err start_aps(struct bus *cpu_bus, int ap_count, atomic_t *num_ap return CB_ERR; /* Wait for CPUs to check in. */ - if (wait_for_aps(num_aps, ap_count, 400000 /* 400 ms */, 50 /* us */) != CB_SUCCESS) { + total_delay = 50000 * ap_count; /* 50 ms per AP */ + if (wait_for_aps(num_aps, ap_count, total_delay, 50 /* us */) != CB_SUCCESS) { printk(BIOS_ERR, "Not all APs checked in: %d/%d.\n", atomic_read(num_aps), ap_count); return CB_ERR; |