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authorElyes HAOUAS <ehaouas@noos.fr>2021-02-09 17:51:25 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-11 10:19:04 +0000
commit56a676e5d0c7980e1968024758358a550867ef92 (patch)
tree466586e9106f01beb5cf5f5f98e34c1c8a166bfc /src/cpu
parentf843e0a8efcc6f0474df689a3fc4b388cfe6447b (diff)
cpu/intel/microcode: Fix typo in function parameter
Change-Id: I9b03105a6808a67c2101917e1822729407271627 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50441 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/microcode/microcode.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index 86739909c7..2c8a2121f2 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -187,7 +187,7 @@ void intel_update_microcode_from_cbfs(void)
}
#if ENV_RAMSTAGE
-__weak int soc_skip_ucode_update(u32 currrent_patch_id,
+__weak int soc_skip_ucode_update(u32 current_patch_id,
u32 new_patch_id)
{
return 0;