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authorKane Chen <kane.chen@intel.corp-partner.google.com>2022-11-29 10:25:20 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-12-12 13:57:24 +0000
commit4c3749884d717b6816098a1a29a95bff7a706838 (patch)
treeffdc771f073435ccd125b776f7f9d712e8eb197d /src/cpu
parentf945118f541d886a243101dfccb79ba967d72312 (diff)
cpu/x86/mtrr: Print cpu index number when set up MTRRs for BSP/APs
MTRR setup will be assigned to all APs. It's hard to debug race condition without showing apic id. Change-Id: Ifd2e1e411f86fa3ea42ed50546facec31b89c3e1 Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64467 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/x86/mtrr/mtrr.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 5f7535fa39..4e2244d5ec 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -291,6 +291,7 @@ static void commit_fixed_mtrrs(void)
int j;
int msr_num;
int type_index;
+ int cpu_idx = cpu_index();
/* 8 ranges per msr. */
msr_t fixed_msrs[NUM_FIXED_MTRRS];
unsigned long msr_index[NUM_FIXED_MTRRS];
@@ -334,8 +335,8 @@ static void commit_fixed_mtrrs(void)
ASSERT(msr_num == NUM_FIXED_MTRRS)
for (i = 0; i < ARRAY_SIZE(fixed_msrs); i++)
- printk(BIOS_DEBUG, "MTRR: Fixed MSR 0x%lx 0x%08x%08x\n",
- msr_index[i], fixed_msrs[i].hi, fixed_msrs[i].lo);
+ printk(BIOS_DEBUG, "CPU 0x%x: MTRR: Fixed MSR 0x%lx 0x%08x%08x\n",
+ cpu_idx, msr_index[i], fixed_msrs[i].hi, fixed_msrs[i].lo);
disable_cache();
for (i = 0; i < ARRAY_SIZE(fixed_msrs); i++)
@@ -354,7 +355,7 @@ void x86_setup_fixed_mtrrs(void)
{
x86_setup_fixed_mtrrs_no_enable();
- printk(BIOS_SPEW, "call enable_fixed_mtrr()\n");
+ printk(BIOS_SPEW, "CPU 0x%x call enable_fixed_mtrr()\n", cpu_index());
enable_fixed_mtrr();
}
@@ -806,8 +807,8 @@ static void _x86_setup_mtrrs(unsigned int above4gb)
x86_setup_fixed_mtrrs();
address_size = cpu_phys_address_size();
- printk(BIOS_DEBUG, "CPU physical address size: %d bits\n",
- address_size);
+ printk(BIOS_DEBUG, "CPU 0x%x setup mtrr for CPU physical address size: %d bits\n",
+ cpu_index(), address_size);
x86_setup_var_mtrrs(address_size, above4gb);
}