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authorDamien Roth <yves.r.roth@gmail.com>2016-01-18 13:59:26 -0700
committerMartin Roth <martinroth@google.com>2016-02-14 22:47:37 +0100
commitbedbd67e649796808421a6ed79bbb16be57f264d (patch)
tree918f0fb1428ab50079d188848c0deb9d3634edbe /src/cpu
parent07a196eaa20d5c1e22db2f487317ae10b6b731a9 (diff)
cpu/amd: Update/Add license headers
These license headers were either not compliant with the coreboot standard or were missing completely. Change-Id: I0c46ad9ba7f3d950b3eff96ee6e9c36acbf1a3a5 Signed-off-by: Damien Roth <yves.r.roth@gmail.com> Reviewed-on: https://review.coreboot.org/13288 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/agesa/family15rl/chip_name.c13
-rw-r--r--src/cpu/amd/agesa/family15rl/udelay.c19
-rw-r--r--src/cpu/amd/agesa/heapmanager.c13
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c15
-rw-r--r--src/cpu/amd/dualcore/amd_sibling.c15
-rw-r--r--src/cpu/amd/geode_gx2/cpubug.c13
-rw-r--r--src/cpu/amd/geode_gx2/cpureginit.c13
-rw-r--r--src/cpu/amd/geode_gx2/syspreinit.c13
-rw-r--r--src/cpu/amd/model_fxx/init_cpus.c13
-rw-r--r--src/cpu/amd/model_fxx/microcode_blob.c13
-rw-r--r--src/cpu/amd/model_fxx/model_fxx_init.c17
-rw-r--r--src/cpu/amd/mtrr/amd_mtrr.c13
-rw-r--r--src/cpu/amd/pi/00630F01/udelay.c19
-rw-r--r--src/cpu/amd/pi/heapmanager.c13
14 files changed, 190 insertions, 12 deletions
diff --git a/src/cpu/amd/agesa/family15rl/chip_name.c b/src/cpu/amd/agesa/family15rl/chip_name.c
index 83915c93b5..62442acbf1 100644
--- a/src/cpu/amd/agesa/family15rl/chip_name.c
+++ b/src/cpu/amd/agesa/family15rl/chip_name.c
@@ -1,6 +1,17 @@
/*
+ * This file is part of the coreboot project.
+ *
* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
- * Subject to the GNU GPL v2, or (at your option) any later version.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
#include <device/device.h>
diff --git a/src/cpu/amd/agesa/family15rl/udelay.c b/src/cpu/amd/agesa/family15rl/udelay.c
index 5873237b0c..272e103110 100644
--- a/src/cpu/amd/agesa/family15rl/udelay.c
+++ b/src/cpu/amd/agesa/family15rl/udelay.c
@@ -1,10 +1,23 @@
/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
* udelay() impementation for SMI handlers
* This is neat in that it never writes to hardware registers, and thus does not
* modify the state of the hardware while servicing SMIs.
- *
- * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
- * Subject to the GNU GPL v2, or (at your option) any later version.
*/
#include <cpu/x86/msr.h>
diff --git a/src/cpu/amd/agesa/heapmanager.c b/src/cpu/amd/agesa/heapmanager.c
index e6f1e5f508..701185abca 100644
--- a/src/cpu/amd/agesa/heapmanager.c
+++ b/src/cpu/amd/agesa/heapmanager.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include "AGESA.h"
#include "amdlib.h"
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 435fdcb588..7e33d3219c 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -1,7 +1,20 @@
-/* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>,
+ * Raptor Engineering
* Copyright (C) 2012 ChromeOS Authors
* 2005.6 by yhlu
* 2006.3 yhlu add copy data from CAR to ram
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
#include <string.h>
#include <arch/stages.h>
diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c
index e1d4d2e0e2..e0723ce011 100644
--- a/src/cpu/amd/dualcore/amd_sibling.c
+++ b/src/cpu/amd/dualcore/amd_sibling.c
@@ -1,4 +1,17 @@
-/* 2004.12 yhlu add dual core support */
+/*
+ * This file is part of the coreboot project.
+ *
+ * 2004.12 yhlu add dual core support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
#include <console/console.h>
#include <cpu/cpu.h>
diff --git a/src/cpu/amd/geode_gx2/cpubug.c b/src/cpu/amd/geode_gx2/cpubug.c
index b6824adf80..41e32ebde3 100644
--- a/src/cpu/amd/geode_gx2/cpubug.c
+++ b/src/cpu/amd/geode_gx2/cpubug.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <console/console.h>
#include <arch/io.h>
#include <stdint.h>
diff --git a/src/cpu/amd/geode_gx2/cpureginit.c b/src/cpu/amd/geode_gx2/cpureginit.c
index e0ecd62722..83d0097c02 100644
--- a/src/cpu/amd/geode_gx2/cpureginit.c
+++ b/src/cpu/amd/geode_gx2/cpureginit.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
/* cpuRegInit */
void cpuRegInit (void)
diff --git a/src/cpu/amd/geode_gx2/syspreinit.c b/src/cpu/amd/geode_gx2/syspreinit.c
index 814034823c..350e6df513 100644
--- a/src/cpu/amd/geode_gx2/syspreinit.c
+++ b/src/cpu/amd/geode_gx2/syspreinit.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
/* StartTimer1
*
* Entry: none
diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c
index 85cd46df74..8968e7e0be 100644
--- a/src/cpu/amd/model_fxx/init_cpus.c
+++ b/src/cpu/amd/model_fxx/init_cpus.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include "cpu/amd/car/post_cache_as_ram.c"
#if CONFIG_HAVE_OPTION_TABLE
diff --git a/src/cpu/amd/model_fxx/microcode_blob.c b/src/cpu/amd/model_fxx/microcode_blob.c
index 71f94389fc..691ae83d14 100644
--- a/src/cpu/amd/model_fxx/microcode_blob.c
+++ b/src/cpu/amd/model_fxx/microcode_blob.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
unsigned char microcode[] __attribute__ ((aligned(16))) = {
#if !CONFIG_K8_REV_F_SUPPORT
#include "../../../../3rdparty/blobs/cpu/amd/model_fxx/microcode.h"
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index 1ef195d05c..b1e599acb1 100644
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -1,13 +1,24 @@
-/* Needed so the AMD K8 runs correctly. */
-/* this should be done by Eric
+/*
+ * This file is part of the coreboot project.
+ *
* 2004.11 yhlu add d0 e0 support
* 2004.12 yhlu add dual core support
* 2005.02 yhlu add e0 memory hole support
-
* Copyright 2005 AMD
* 2005.08 yhlu add microcode support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
+/* Needed so the AMD K8 runs correctly. */
+
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index 033ec53d3a..6df8458ac1 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include <console/console.h>
#include <device/device.h>
#include <arch/cpu.h>
diff --git a/src/cpu/amd/pi/00630F01/udelay.c b/src/cpu/amd/pi/00630F01/udelay.c
index 5873237b0c..332f730843 100644
--- a/src/cpu/amd/pi/00630F01/udelay.c
+++ b/src/cpu/amd/pi/00630F01/udelay.c
@@ -1,10 +1,23 @@
/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
* udelay() impementation for SMI handlers
* This is neat in that it never writes to hardware registers, and thus does not
* modify the state of the hardware while servicing SMIs.
- *
- * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
- * Subject to the GNU GPL v2, or (at your option) any later version.
*/
#include <cpu/x86/msr.h>
diff --git a/src/cpu/amd/pi/heapmanager.c b/src/cpu/amd/pi/heapmanager.c
index e33b29f22c..c5e4202090 100644
--- a/src/cpu/amd/pi/heapmanager.c
+++ b/src/cpu/amd/pi/heapmanager.c
@@ -1,3 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
#include "AGESA.h"
#include "amdlib.h"