diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-11-23 13:15:19 +0100 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-24 12:03:55 +0000 |
commit | 9d733def594cd9b982260743d2c48b3abad17255 (patch) | |
tree | 1aa4f16e8e42a4edf5b38a0f9d117bb4d32920be /src/cpu | |
parent | 739a6ad1ac098231c34587c69237906e721b7e91 (diff) |
soc/intel/broadwell: Use Haswell CPU headers
Now that the boards use Haswell's CPU code, Broadwell can be updated.
Change-Id: If07e5272f07edb59bb18eef1f80d7d5807b26e66
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46949
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/intel/haswell/haswell.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index e45acd5a27..133a12945d 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -168,12 +168,19 @@ void intel_cpu_haswell_finalize_smm(void); void set_power_limits(u8 power_limit_1_time); int cpu_config_tdp_levels(void); +void set_max_freq(void); + /* CPU identification */ static inline u32 cpu_family_model(void) { return cpuid_eax(1) & 0x0fff0ff0; } +static inline u32 cpu_stepping(void) +{ + return cpuid_eax(1) & 0xf; +} + static inline int haswell_is_ult(void) { return CONFIG(INTEL_LYNXPOINT_LP); |