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author | Arthur Heymans <arthur@aheymans.xyz> | 2020-08-05 23:41:05 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-17 06:18:09 +0000 |
commit | 96c25cded4c12ffe93b9f27d975b7027e50fabc4 (patch) | |
tree | a2263cf12906e1203ab17883d06f68841c8b03dd /src/cpu | |
parent | 363cd1d886cf568548810202c0f69a0d9c42849d (diff) |
cpu/intel/model_6fx: Include Conroe-L microcode
This CPU variant has a different CPUID signature.
Change-Id: Ice2c1b86382e5d91d9eda717e6522ed0a9c2229f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/intel/model_6fx/Makefile.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/intel/model_6fx/Makefile.inc b/src/cpu/intel/model_6fx/Makefile.inc index f1d64b7454..f6f838de39 100644 --- a/src/cpu/intel/model_6fx/Makefile.inc +++ b/src/cpu/intel/model_6fx/Makefile.inc @@ -4,4 +4,5 @@ subdirs-y += ../common ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c subdirs-y += ../smm/gen1 -cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0f-*) +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0f-*) \ + 3rdparty/intel-microcode/intel-ucode/06-16-01 |