diff options
| author | Lubomir Rintel <lkundrak@v3.sk> | 2018-01-01 14:36:49 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-25 11:45:28 +0000 |
| commit | 49b4285c0c46d6d0ee53315fbf68745f6d67662b (patch) | |
| tree | 7a77dd600b4e790cca509f07c9b0d56aeef2a604 /src/cpu | |
| parent | 9618cf436252095e68891d5a28e2c8b1b1ab6ac9 (diff) | |
cpu/via/car: drop CARTEST
It's broken for years and nobody noticed (%ei for %esi and stackerr for
.Lhlt). It would also leave CAR not zeroed out.
Change-Id: Ib1ca8e8e71ea8d1bf834c349fd6e2ca81538b6eb
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/25797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/via/car/cache_as_ram.inc | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc index a131517cf4..4ac82daded 100644 --- a/src/cpu/via/car/cache_as_ram.inc +++ b/src/cpu/via/car/cache_as_ram.inc @@ -153,18 +153,6 @@ clear_fixed_var_mtrr_out: xorl %eax, %eax rep stosl -#ifdef CARTEST - /* - * IMPORTANT: The following calculation _must_ be done at runtime. See - * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html - */ - movl $copy_and_run, %esi - andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %ei - movl %esi, %edi - movl $(CONFIG_XIP_ROM_SIZE >> 2), %ecx - rep lodsl -#endif - /* * The key point of this CAR code is C7 cache does not turn into * "no fill" mode, which is not compatible with general CAR code. @@ -173,26 +161,6 @@ clear_fixed_var_mtrr_out: movl $(CacheBase + CacheSize - 4), %eax movl %eax, %esp -#ifdef CARTEST -testok: - post_code(0x40) - xorl %edx, %edx - xorl %eax, %eax - movl $0x5c5c, %edx - pushl %edx - pushl %edx - pushl %edx - pushl %edx - pushl %edx - popl %esi - popl %esi - popl %eax - popl %eax - popl %eax - cmpl %edx, %eax - jne stackerr -#endif - /* Restore the BIST result. */ movl %ebp, %eax |