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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-08-09 15:48:51 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-08-09 18:04:32 +0200
commit728ff392e7aa11260675721e87c31c9070c1903f (patch)
tree1c034e0d4c14f72e189c4377d7a2614d12543a8a /src/cpu
parentff0df2bba5f29dc992c0ab59b44337b7277c231a (diff)
cpu/amd/geode_lx/cache_as_ram.inc: Trivial - Fix indent with tabs
Change-Id: Ic65f8d2cbb5bc459cf513c6b34a5f1846cb2b897 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6549 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/amd/geode_lx/cache_as_ram.inc32
1 files changed, 16 insertions, 16 deletions
diff --git a/src/cpu/amd/geode_lx/cache_as_ram.inc b/src/cpu/amd/geode_lx/cache_as_ram.inc
index 45fd16691b..db95deefb3 100644
--- a/src/cpu/amd/geode_lx/cache_as_ram.inc
+++ b/src/cpu/amd/geode_lx/cache_as_ram.inc
@@ -189,24 +189,25 @@ DCacheSetupGood:
call main
done_cache_as_ram_main:
- /* We now run over the stack-in-cache, copying it back to itself to invalidate the cache */
-
- push %edi
- mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx
- push %esi
- mov $(CONFIG_DCACHE_RAM_BASE),%edi
- mov %edi,%esi
- cld
- rep movsl %ds:(%esi),%es:(%edi)
- pop %esi
- pop %edi
+ /* We now run over the stack-in-cache,
+ * copying it back to itself to invalidate the cache */
+
+ push %edi
+ mov $(CONFIG_DCACHE_RAM_SIZE/4),%ecx
+ push %esi
+ mov $(CONFIG_DCACHE_RAM_BASE),%edi
+ mov %edi,%esi
+ cld
+ rep movsl %ds:(%esi),%es:(%edi)
+ pop %esi
+ pop %edi
/* Clear the cache out to ram */
wbinvd
- /* re-enable the cache */
- movl %cr0, %eax
- xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */
- movl %eax, %cr0
+ /* re-enable the cache */
+ movl %cr0, %eax
+ xorl $(CR0_CD + CR0_NW), %eax /* clear the CD and NW bits */
+ movl %eax, %cr0
__main:
post_code(POST_PREPARE_RAMSTAGE)
@@ -227,4 +228,3 @@ __main:
post_code(POST_DEAD_CODE)
hlt
jmp .Lhlt
-