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| author | Roy Mingi Park <roy.mingi.park@intel.com> | 2019-04-02 21:12:00 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-11 11:27:57 +0000 |
| commit | 67d630945ba6d70b630065f1a4dd8ce8a67ae5d2 (patch) | |
| tree | c149178abaf08477bd527569eb47a220179cce3d /src/cpu | |
| parent | f74f6cbde5b51bb85fa3b20b80f482ef41eb7e9b (diff) | |
mb/google/sarien: Change GPIOs to avoid leakage during S0iX
Three GPIOs are not being used and this change will save 2-3mW
power during S0iX and this power saving is only for Arcada
BUG=b:129990365
TEST= Measure total platform power during S0iX from Arcada
Change-Id: Ie0208bd6c7affb2e87fd76005b727ea7effdf434
Signed-off-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/cpu')
0 files changed, 0 insertions, 0 deletions