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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-02-19 08:58:12 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-03-04 15:24:32 +0100
commit65ba20e17bd91e4b92e34b495f64a51a0313f6a9 (patch)
tree4365d0fcd3548c03d5895df7b4114e77c6d5d1dd /src/cpu
parentc5332e30da4c314c1d44d6d3f9df6d2ae6417e0f (diff)
allwinner/a10: Fix baudrate calculation
UART input clock is platform dependent. Also account for possible use of get_option() where baudrate is not compile-time constant. Change-Id: Ie1c8789ef72430e43fc33bfa9ffb9f5346762439 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5289 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/allwinner/a10/uart.c5
-rw-r--r--src/cpu/allwinner/a10/uart_console.c22
2 files changed, 9 insertions, 18 deletions
diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c
index 97ac302ddc..990026be26 100644
--- a/src/cpu/allwinner/a10/uart.c
+++ b/src/cpu/allwinner/a10/uart.c
@@ -7,6 +7,7 @@
#include "uart.h"
#include <arch/io.h>
+#include <uart.h>
#include <uart8250.h>
/**
@@ -19,11 +20,11 @@ void a10_uart_configure(void *uart_base, u32 baud_rate, u8 data_bits,
u16 div;
struct a10_uart *uart = uart_base;
+ div = (u16) uart_baudrate_divisor(baud_rate,
+ uart_platform_refclk(), 16);
/* Enable access to Divisor Latch register */
write32(UART_LCR_DLAB, &uart->lcr);
/* Set baudrate */
- /* FIXME: We assume clock is 24MHz, which may not be the case */
- div = 24000000 / 16 / baud_rate;
write32((div >> 8) & 0xff, &uart->dlh);
write32(div & 0xff, &uart->dll);
/* Set line control */
diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c
index 58930ddd66..f7bd3c6dc6 100644
--- a/src/cpu/allwinner/a10/uart_console.c
+++ b/src/cpu/allwinner/a10/uart_console.c
@@ -38,29 +38,19 @@ static void *get_console_uart_base_addr(void)
return (void *)A1X_UART0_BASE;
}
-static u32 get_console_uart_baud(void)
+/* FIXME: We assume clock is 24MHz, which may not be the case. */
+unsigned int uart_platform_refclk(void)
{
- if (CONFIG_CONSOLE_SERIAL_115200)
- return 115200;
- else if (CONFIG_CONSOLE_SERIAL_57600)
- return 57600;
- else if (CONFIG_CONSOLE_SERIAL_38400)
- return 34800;
- else if (CONFIG_CONSOLE_SERIAL_19200)
- return 19200;
- else if (CONFIG_CONSOLE_SERIAL_9600)
- return 9600;
-
- /* Default to 115200 if selection is invalid */
- return 115200;
+ return 24000000;
}
static void a10_uart_init_dev(void)
{
void *uart_base = get_console_uart_base_addr();
+
/* Use default 8N1 encoding */
- a10_uart_configure(uart_base, get_console_uart_baud(),
- 8, UART_PARITY_NONE, 1);
+ a10_uart_configure(uart_base, default_baudrate(),
+ 8, UART_PARITY_NONE, 1);
a10_uart_enable_fifos(uart_base);
}