diff options
author | Andrew Wu <arw@dmp.com.tw> | 2013-06-19 18:55:08 +0800 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-06-20 19:14:44 +0200 |
commit | 52e665bdd2c71b86643cbb1ee7e2fa5e96223059 (patch) | |
tree | ca7df212b56af01e562b10e824895cde1507eb2a /src/cpu | |
parent | 483ff8253943b134e5e07ac89d08e49fca1c28d8 (diff) |
Add initial support for DMP Vortex86EX CPU.
Change-Id: I74de250c69a57109362be1b2f00c0b4aa24a64e8
Signed-off-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-on: http://review.coreboot.org/3473
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/Kconfig | 1 | ||||
-rw-r--r-- | src/cpu/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/dmp/Kconfig | 20 | ||||
-rw-r--r-- | src/cpu/dmp/Makefile.inc | 20 | ||||
-rw-r--r-- | src/cpu/dmp/vortex86ex/Kconfig | 22 | ||||
-rw-r--r-- | src/cpu/dmp/vortex86ex/Makefile.inc | 31 | ||||
-rw-r--r-- | src/cpu/dmp/vortex86ex/biosdata.inc | 84 | ||||
-rw-r--r-- | src/cpu/dmp/vortex86ex/biosdata.lds | 84 | ||||
-rw-r--r-- | src/cpu/dmp/vortex86ex/biosdata_ex.inc | 176 | ||||
-rw-r--r-- | src/cpu/dmp/vortex86ex/biosdata_ex.lds | 35 | ||||
-rw-r--r-- | src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc | 531 |
11 files changed, 1005 insertions, 0 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index d1e52376dd..788e2190bc 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -12,6 +12,7 @@ endif # ARCH_ARM if ARCH_X86 source src/cpu/amd/Kconfig +source src/cpu/dmp/Kconfig source src/cpu/intel/Kconfig source src/cpu/via/Kconfig source src/cpu/qemu-x86/Kconfig diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index 8b9d0747c8..09d36ec67e 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -2,6 +2,7 @@ ## Subdirectories ################################################################################ subdirs-y += amd +subdirs-y += dmp subdirs-y += armltd subdirs-y += intel subdirs-y += samsung diff --git a/src/cpu/dmp/Kconfig b/src/cpu/dmp/Kconfig new file mode 100644 index 0000000000..db7e2bd114 --- /dev/null +++ b/src/cpu/dmp/Kconfig @@ -0,0 +1,20 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 DMP Electronics Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +source src/cpu/dmp/vortex86ex/Kconfig diff --git a/src/cpu/dmp/Makefile.inc b/src/cpu/dmp/Makefile.inc new file mode 100644 index 0000000000..002212c018 --- /dev/null +++ b/src/cpu/dmp/Makefile.inc @@ -0,0 +1,20 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 DMP Electronics Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +subdirs-$(CONFIG_CPU_DMP_VORTEX86EX) += vortex86ex diff --git a/src/cpu/dmp/vortex86ex/Kconfig b/src/cpu/dmp/vortex86ex/Kconfig new file mode 100644 index 0000000000..54db4e004e --- /dev/null +++ b/src/cpu/dmp/vortex86ex/Kconfig @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 DMP Electronics Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config CPU_DMP_VORTEX86EX + bool + select UDELAY_TSC diff --git a/src/cpu/dmp/vortex86ex/Makefile.inc b/src/cpu/dmp/vortex86ex/Makefile.inc new file mode 100644 index 0000000000..ff0b58ce1d --- /dev/null +++ b/src/cpu/dmp/vortex86ex/Makefile.inc @@ -0,0 +1,31 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 DMP Electronics Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm + +chipset_bootblock_inc += $(src)/cpu/dmp/vortex86ex/biosdata.inc +chipset_bootblock_inc += $(src)/cpu/dmp/vortex86ex/biosdata_ex.inc +chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata.lds +chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata_ex.lds + +ROMCCFLAGS := -mcpu=i386 -O2 diff --git a/src/cpu/dmp/vortex86ex/biosdata.inc b/src/cpu/dmp/vortex86ex/biosdata.inc new file mode 100644 index 0000000000..055fffea8c --- /dev/null +++ b/src/cpu/dmp/vortex86ex/biosdata.inc @@ -0,0 +1,84 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 DMP Electronics Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + .section ".dmp_reserved", "a", @progbits + + .skip 0x3c000 - 0x3bc00, 0xff + +.previous + + .section ".dmp_kbd_fw_part2", "a", @progbits + + .skip 0x3d000 - 0x3c000, 0xff + +.previous + + .section ".dmp_mtbf_low_cnt", "a", @progbits + + .skip 0x3e000 - 0x3d000, 0xff + +.previous + + .section ".dmp_kbd_fw_part1", "a", @progbits + + #include "src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc" + +.previous + + .section ".dmp_spi_flash_disk_driver", "a", @progbits + + .skip 0x3f800 - 0x3f000, 0xff + +.previous + + .section ".dmp_frontdoor", "a", @progbits + + .skip 0x3fd00 - 0x3f800, 0xff + +.previous + + .section ".dmp_isoinfo", "a", @progbits + + .skip 26 * 16, 0xff + +.previous + + .section ".dmp_isodata_checksum", "a", @progbits + + .skip 8, 0xff + +.previous + + .section ".dmp_mac", "a", @progbits + + .skip 6, 0xff + +.previous + + .section ".dmp_mtbf_limit", "a", @progbits + + .skip 3, 0xff + +.previous + + .section ".dmp_isodata", "a", @progbits + + .skip 32, 0xff + +.previous diff --git a/src/cpu/dmp/vortex86ex/biosdata.lds b/src/cpu/dmp/vortex86ex/biosdata.lds new file mode 100644 index 0000000000..b525b2a1dd --- /dev/null +++ b/src/cpu/dmp/vortex86ex/biosdata.lds @@ -0,0 +1,84 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 DMP Electronics Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +SECTIONS { + + /* Vortex86 ROM fixed data areas used range is too big, we need + * to move bootblock from default address to another place, + * otherwise .dmp_frontdoor section can't be included. + * Address before ..fbc00 is available. + */ + ROMLOC_MIN = 0xffffbc00 - (_erom - _rom + 16) - + (CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0); + + . = 0xffffbc00; + .dmp_reserved (.): { + *(.dmp_reserved) + } + + . = 0xffffc000; + .dmp_kbd_fw_part2 (.): { + *(.dmp_kbd_fw_part2) + } + + . = 0xffffd000; + .dmp_mtbf_low_cnt (.): { + *(.dmp_mtbf_low_cnt) + } + + . = 0xffffe000; + .dmp_kbd_fw_part1 (.): { + *(.dmp_kbd_fw_part1) + } + + . = 0xfffff000; + .dmp_spi_flash_disk_driver (.): { + *(.dmp_spi_flash_disk_driver) + } + + . = 0xfffff800; + .dmp_frontdoor (.): { + *(.dmp_frontdoor) + } + + . = 0xfffffe00; + .dmp_isoinfo (.): { + *(.dmp_isoinfo) + } + + . = 0xffffffa0; + .dmp_isodata_checksum (.): { + *(.dmp_isodata_checksum) + } + + . = 0xffffffb0; + .dmp_mac (.): { + *(.dmp_mac) + } + + . = 0xffffffb8; + .dmp_mtbf_limit (.): { + *(.dmp_mtbf_limit) + } + + . = 0xffffffc0; + .dmp_isodata (.): { + *(.dmp_isodata) + } +} diff --git a/src/cpu/dmp/vortex86ex/biosdata_ex.inc b/src/cpu/dmp/vortex86ex/biosdata_ex.inc new file mode 100644 index 0000000000..4a2478eaf3 --- /dev/null +++ b/src/cpu/dmp/vortex86ex/biosdata_ex.inc @@ -0,0 +1,176 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 DMP Electronics Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "config.h" + +/* +PLL Freq = 25 * NS /(MS * 2^RS) +CPU Freq = PLL/(CPU_DIV+2) +DRAM Freq = PLL/2(DRAM_DIV+1) + +DDR3 +CPU/DRAM/PCI B6 B7 BB BC BD BF +200/200/33 30 03 0F 02 8F 07 +300/300/33 48 03 0F 02 1F 07 +300/300/33 48 03 0F 3A DF 07 ; write leveling disable, cpu bypass disable +300/300/33 48 03 0F 22 3F 07 ; cpu bypass disable +300/300/100 48 03 23 02 7F 07 +400/200/33 60 43 0F 02 3F 07 ; without 200MHz timing, so set 300MHz timing +400/200/100 60 43 23 02 4F 07 +400/400/33 60 03 0F 02 BF 09 +500/250/33 50 42 0F 02 DF 07 +500/500/33 78 03 0F 02 4F 09 +400/300/33 90 53 0F 02 3F 07 +400/300/33 90 53 0F 1A DF 07 ; write leveling/gate training disable +400/300/100 90 53 23 02 9F 07 +444/333/33 A0 53 0F 02 5F 08 +466/350/33 A8 53 0F 02 DF 09 +500/375/33 B4 53 0F 02 AF 09 +*/ + +#if CONFIG_PLL_200_200_33 + // 200/200/33 30 03 0F 02 8F 07 + byte_fffb6 = 0x30 + byte_fffb7 = 0x03 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_300_300_33 + // 300/300/33 48 03 0F 02 1F 07 + byte_fffb6 = 0x48 + byte_fffb7 = 0x03 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_300_300_100 + // 300/300/100 48 03 23 02 7F 07 + byte_fffb6 = 0x48 + byte_fffb7 = 0x03 + byte_fffbb = 0x23 + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_400_200_33 + // 400/200/33 60 43 0F 02 3F 07 ; without 200MHz timing, so set 300MHz timing + byte_fffb6 = 0x60 + byte_fffb7 = 0x43 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_400_200_100 + // 400/200/100 60 43 23 02 4F 07 + byte_fffb6 = 0x60 + byte_fffb7 = 0x43 + byte_fffbb = 0x23 + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_400_400_33 + // 400/400/33 60 03 0F 02 BF 09 + byte_fffb6 = 0x60 + byte_fffb7 = 0x03 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x09 +#elif CONFIG_PLL_500_250_33 + // 500/250/33 50 42 0F 02 DF 07 + byte_fffb6 = 0x50 + byte_fffb7 = 0x42 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_500_500_33 + // 500/500/33 78 03 0F 02 4F 09 + byte_fffb6 = 0x78 + byte_fffb7 = 0x03 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x09 +#elif CONFIG_PLL_400_300_33 + // 400/300/33 90 53 0F 02 3F 07 + byte_fffb6 = 0x90 + byte_fffb7 = 0x53 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_400_300_100 + // 400/300/100 90 53 23 02 9F 07 + byte_fffb6 = 0x90 + byte_fffb7 = 0x53 + byte_fffbb = 0x23 + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x07 +#elif CONFIG_PLL_444_333_33 + // 444/333/33 A0 53 0F 02 5F 08 + byte_fffb6 = 0xa0 + byte_fffb7 = 0x53 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x08 +#elif CONFIG_PLL_466_350_33 + // 466/350/33 A8 53 0F 02 DF 09 + byte_fffb6 = 0xa8 + byte_fffb7 = 0x53 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x09 +#elif CONFIG_PLL_500_375_33 + // 500/375/33 B4 53 0F 02 AF 09 + byte_fffb6 = 0xb4 + byte_fffb7 = 0x53 + byte_fffbb = 0x0f + byte_fffbc = 0x02 + byte_fffbe = 0xff + byte_fffbf = 0x09 +#else + #error Error Strap PLL config. +#endif + +tmp_sum = byte_fffb6 + byte_fffb7 + byte_fffbb + byte_fffbc +pll_checksum = ((tmp_sum >> 8) & 0x3) + ((tmp_sum >> 4) & 0x0f) + (tmp_sum & 0x0f) + +byte_fffbd = ((pll_checksum & 0x0f) << 4) | 0x0f + + .section ".a9123_crossbar_config", "a", @progbits + + .skip 0x3fdf0 - 0x3fd00, 0xff + +.previous + + .section ".a9123_strap_1", "a", @progbits + + .byte byte_fffb6, byte_fffb7 + +.previous + + .section ".a9123_strap_2", "a", @progbits + + .byte byte_fffbb, byte_fffbc, byte_fffbd, byte_fffbe, byte_fffbf + +.previous diff --git a/src/cpu/dmp/vortex86ex/biosdata_ex.lds b/src/cpu/dmp/vortex86ex/biosdata_ex.lds new file mode 100644 index 0000000000..d711648e11 --- /dev/null +++ b/src/cpu/dmp/vortex86ex/biosdata_ex.lds @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 DMP Electronics Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +SECTIONS { + . = 0xfffffd00; + .a9123_crossbar_config (.): { + *(.a9123_crossbar_config) + } + + . = 0xffffffb6; + .a9123_strap_1 (.): { + *(.a9123_strap_1) + } + + . = 0xffffffbb; + .a9123_strap_2 (.): { + *(.a9123_strap_2) + } +} diff --git a/src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc b/src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc new file mode 100644 index 0000000000..486bf1b613 --- /dev/null +++ b/src/cpu/dmp/vortex86ex/dmp_kbd_fw_part1.inc @@ -0,0 +1,531 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 DMP Electronics Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + .byte 0x02, 0x04, 0xa3, 0x02, 0x0a, 0xfb, 0xef, 0x75 + .byte 0xf0, 0x03, 0xa4, 0xff, 0xae, 0x07, 0x1f, 0xee + .byte 0x70, 0xfa, 0x22, 0x02, 0x0a, 0xd5, 0x12, 0x09 + .byte 0x5e, 0x7f, 0x30, 0x12, 0x05, 0xfb, 0x90, 0xe0 + .byte 0x00, 0x74, 0x16, 0xf0, 0x12, 0x0d, 0xda, 0xc2 + .byte 0x92, 0xc2, 0x93, 0xc2, 0x90, 0xd2, 0x91, 0xd2 + .byte 0xb8, 0xd2, 0xba, 0xd2, 0x88, 0xd2, 0xa8, 0xd2 + .byte 0x8a, 0xd2, 0xaa, 0x7d, 0x44, 0xe4, 0xff, 0x12 + .byte 0x0e, 0x3a, 0x7d, 0x4d, 0x0f, 0x12, 0x0e, 0x3a + .byte 0x7d, 0x26, 0x0f, 0x12, 0x0e, 0x3a, 0x7d, 0x50 + .byte 0x0f, 0x12, 0x0e, 0x3a, 0x12, 0x0e, 0x59, 0xd2 + .byte 0xaf, 0x7f, 0xb1, 0x12, 0x0e, 0xf5, 0x90, 0x0f + .byte 0xfe, 0xe4, 0x93, 0xff, 0xb4, 0x55, 0x0a, 0xa3 + .byte 0xe4, 0x93, 0xb4, 0xaa, 0x04, 0xd2, 0x08, 0x80 + .byte 0x10, 0xef, 0xb4, 0x12, 0x0c, 0x90, 0x0f, 0xff + .byte 0xe4, 0x93, 0xb4, 0x34, 0x04, 0xc2, 0x08, 0xc2 + .byte 0x12, 0x12, 0x03, 0x6c, 0x12, 0x0d, 0xa6, 0x12 + .byte 0x01, 0x08, 0x30, 0x01, 0x27, 0x30, 0x12, 0x1f + .byte 0x20, 0x00, 0x1c, 0x30, 0x11, 0x19, 0x12, 0x0d + .byte 0x25, 0x12, 0x09, 0xc4, 0x30, 0x08, 0x05, 0xc2 + .byte 0x1a, 0x12, 0x0a, 0x26, 0x12, 0x0d, 0x92, 0xd2 + .byte 0x00, 0x12, 0x0d, 0x3b, 0x12, 0x07, 0xc2, 0x12 + .byte 0x0d, 0xda, 0xc2, 0x01, 0x12, 0x03, 0x6c, 0x12 + .byte 0x07, 0x2e, 0x30, 0x12, 0xc4, 0x30, 0x00, 0xc1 + .byte 0x90, 0xd0, 0x00, 0xe0, 0x30, 0xe0, 0xba, 0xc2 + .byte 0xaf, 0x12, 0x0e, 0x07, 0x50, 0x0e, 0x12, 0x0e + .byte 0xb6, 0x12, 0x0e, 0xbc, 0xd2, 0x1a, 0x12, 0x0a + .byte 0x26, 0x12, 0x0d, 0x3b, 0xd2, 0xaf, 0x80, 0xa1 + .byte 0xae, 0x03, 0xab, 0x05, 0x53, 0x1a, 0xef, 0x90 + .byte 0xd0, 0x00, 0xe5, 0x1a, 0xf0, 0xad, 0x07, 0x8e + .byte 0x33, 0x7f, 0x20, 0x12, 0x0d, 0x51, 0x43, 0x1a + .byte 0x10, 0x90, 0xd0, 0x00, 0xe5, 0x1a, 0xf0, 0x22 + .byte 0xda, 0x7e, 0x10, 0x09, 0x14, 0x12, 0x0d, 0xa6 + .byte 0x90, 0xe0, 0x00, 0xe0, 0xff, 0x20, 0xe1, 0x03 + .byte 0x02, 0x02, 0xc8, 0xc2, 0xa8, 0xc2, 0xaa, 0x20 + .byte 0x04, 0x03, 0x30, 0x07, 0x05, 0xd2, 0xa8, 0xd2 + .byte 0xaa, 0x22, 0xef, 0xa2, 0xe3, 0x92, 0x1c, 0x90 + .byte 0xf0, 0x00, 0xe0, 0xf5, 0x2c, 0x12, 0x0e, 0x2f + .byte 0xd2, 0xa8, 0xd2, 0xaa, 0x30, 0x1c, 0x03, 0x02 + .byte 0x01, 0xee, 0xc2, 0x1d, 0xc2, 0x1e, 0x20, 0x17 + .byte 0x03, 0x02, 0x01, 0xd4, 0xe5, 0x18, 0x24, 0xe1 + .byte 0x60, 0x3b, 0x24, 0x54, 0x70, 0x03, 0x02, 0x01 + .byte 0xd0, 0x24, 0xfa, 0x60, 0x14, 0x14, 0x60, 0x1e + .byte 0x14, 0x60, 0x1f, 0x14, 0x60, 0x23, 0x24, 0x74 + .byte 0x70, 0x6c, 0xaf, 0x2c, 0x12, 0x05, 0xfb, 0x80 + .byte 0x67, 0xe5, 0x2c, 0x30, 0xe1, 0x04, 0xd2, 0x90 + .byte 0x80, 0x5e, 0xc2, 0x90, 0x80, 0x5a, 0xc2, 0x1f + .byte 0x80, 0x02, 0xd2, 0x1f, 0x85, 0x2c, 0x2f, 0x80 + .byte 0x46, 0xd2, 0x1e, 0x80, 0x4b, 0xe5, 0x2c, 0x70 + .byte 0x1a, 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