summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorMichał Żygowski <michal.zygowski@3mdeb.com>2020-10-31 21:43:25 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-11-09 10:23:25 +0000
commit0d11dbfd6ad4d49b65b2104fa9de546938a3cb44 (patch)
tree77fcf27989e1d27a92a2fb6d3f882e34812ec9e5 /src/cpu
parent58ce44720aac85381d2524ed520b71dce2c3f99c (diff)
cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4
Calculate the frequencies based on the appropriate MSRs and pass them to SMBIOS tables generator. Ivybridge microarchitecture does not yet implement CPUID 16H leaf used to obtain the required frequencies. TEST=Intel Core i7-3770, TianoCore UEFI payload displays the CPU frequency correctly equal 3.4GHz in Boot Manager Menu, dmidecode shows correct frequencies according to Intel ARK, 3.4GHz base and 3.9GHz turbo Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Iefbae6111d39107eacac7e61654311646c6981eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/47058 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/intel/model_206ax/model_206ax_init.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 7fb412c0ca..2afbfeecec 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -18,6 +18,7 @@
#include "chip.h"
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/common/common.h>
+#include <smbios.h>
/*
* List of supported C-states in this processor
@@ -360,6 +361,25 @@ static void set_max_ratio(void)
((perf_ctl.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK);
}
+unsigned int smbios_cpu_get_max_speed_mhz(void)
+{
+ msr_t msr;
+ msr = rdmsr(MSR_TURBO_RATIO_LIMIT);
+ return (msr.lo & 0xff) * SANDYBRIDGE_BCLK;
+}
+
+unsigned int smbios_cpu_get_current_speed_mhz(void)
+{
+ msr_t msr;
+ msr = rdmsr(MSR_PLATFORM_INFO);
+ return ((msr.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK;
+}
+
+unsigned int smbios_processor_external_clock(void)
+{
+ return SANDYBRIDGE_BCLK;
+}
+
static void configure_mca(void)
{
msr_t msr;