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authorJulius Werner <jwerner@chromium.org>2024-06-03 17:39:01 -0700
committerJulius Werner <jwerner@chromium.org>2024-06-05 20:31:03 +0000
commitc770ad624605d76b75bc70c15e69639b79691346 (patch)
treee052c653dee98ee2318d38bd553edcd301788f15 /src/cpu/x86
parent25e3c63b53cf640e1d7d3f9e2657555cd36745df (diff)
cpu/x86: Make 1GB paging the default
This patch flips the polarity of CONFIG_USE_1G_PAGES_TLB into CONFIG_NEED_SMALL_2MB_PAGE_TABLES which is off by default, meaning CPUs added in the future will automatically build the smaller 1GB pages. We can expect support for this feature to be available on all future CPU generations (with the possible exception of embedded edge cases), so this default setting should make mistakes less likely and keep maintenance effort lower. (Besides, enabling the support where it doesn't work fails fast, whereas keeping it disabled where it could work is an inefficiency that can easily go overlooked for a long time.) While this is technically a CPU feature, not a northbridge feature, we support a lot more individual CPUs than northbridges in the pre-SoC era, and they tend to be closely coupled anyway. So select the option at the northbridge level for older CPUs to keep things simpler. Change-Id: I2cf1237a7fb63b8904c2a3d57fead162c66bacde Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82792 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/64bit/Makefile.mk6
-rw-r--r--src/cpu/x86/Kconfig6
2 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/x86/64bit/Makefile.mk b/src/cpu/x86/64bit/Makefile.mk
index b24e4d7de0..1fda087879 100644
--- a/src/cpu/x86/64bit/Makefile.mk
+++ b/src/cpu/x86/64bit/Makefile.mk
@@ -3,10 +3,10 @@
all_x86-y += mode_switch.S
all_x86-y += mode_switch2.S
-ifeq ($(CONFIG_USE_1G_PAGES_TLB),y)
-PAGETABLE_SRC := pt1G.S
-else
+ifeq ($(CONFIG_NEED_SMALL_2MB_PAGE_TABLES),y)
PAGETABLE_SRC := pt.S
+else
+PAGETABLE_SRC := pt1G.S
endif
all_x86-y += $(PAGETABLE_SRC)
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index ec1fa1305a..417989d764 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -152,12 +152,12 @@ config NO_SMM
bool
default n
-config USE_1G_PAGES_TLB
+config NEED_SMALL_2MB_PAGE_TABLES
bool
default n
help
- Select this option to enable access to up to 512 GiB of memory
- by using 1 GiB large pages.
+ Select this option from boards/SoCs that do not support the Page1GB
+ CPUID feature (CPUID.80000001H:EDX.bit26).
config SMM_ASEG
bool