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authorSubrata Banik <subrata.banik@intel.com>2021-07-28 15:38:32 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-11-29 09:45:14 +0000
commit9f91ced9ddaeed6730e53954260d82f665269cb0 (patch)
tree5d769503d148cd45ed3e48b8e8ef77298184e147 /src/cpu/x86
parent561a2afc1859e6f67f1fc337834a6f0d7ec0c858 (diff)
cpu/x86: Rename X86_AMD_INIT_SIPI to X86_INIT_NEED_1_SIPI
This patch renames X86_AMD_INIT_SIPI Kconfig to leverage the same logic (to skip 2nd SIPI and reduce delay between INIT and SIPI while perform AP initialization) even on newer Intel platform. Change-Id: I7a4e6a8b1edc6e8ba43597259bd8b2de697e4e62 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56651 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/Kconfig8
-rw-r--r--src/cpu/x86/mp_init.c2
2 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index 44c9cb6f17..693b8020be 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -164,15 +164,15 @@ config X86_AMD_FIXED_MTRRS
This option informs the MTRR code to use the RdMem and WrMem fields
in the fixed MTRR MSRs.
-config X86_AMD_INIT_SIPI
+config X86_INIT_NEED_1_SIPI
bool
default n
help
This option limits the number of SIPI signals sent during during the
common AP setup. Intel documentation specifies an INIT SIPI SIPI
- sequence, however this doesn't work on some AMD platforms. These
- newer AMD platforms don't need the 10ms wait between INIT and SIPI,
- so skip that too to save some time.
+ sequence, however this doesn't work on some AMD and Intel platforms.
+ These newer AMD and Intel platforms don't need the 10ms wait between
+ INIT and SIPI, so skip that too to save some time.
config SOC_SETS_MSRS
bool
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index c99732fb39..9b5c23036f 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -469,7 +469,7 @@ static enum cb_err start_aps(struct bus *cpu_bus, int ap_count, atomic_t *num_ap
/* Send INIT IPI to all but self. */
lapic_send_ipi(LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | LAPIC_DM_INIT, 0);
- if (!CONFIG(X86_AMD_INIT_SIPI)) {
+ if (!CONFIG(X86_INIT_NEED_1_SIPI)) {
printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n");
mdelay(10);