summaryrefslogtreecommitdiff
path: root/src/cpu/x86
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-08-01 17:22:17 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-01 17:22:17 +0000
commitc9ce895199653555c2e5610a824c9de43494e66d (patch)
tree899688ae733545408f0427098efa05d2d2c14a2f /src/cpu/x86
parentf97654833adc12d9ebcceff633755e2dc9939158 (diff)
make early_mtrr_init() invisible for cache as ram targets as it breaks them.
Fix up converted mainboards that still used early_mtrr_init() Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5678 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/mtrr/earlymtrr.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c
index 1cbc544350..72c471e180 100644
--- a/src/cpu/x86/mtrr/earlymtrr.c
+++ b/src/cpu/x86/mtrr/earlymtrr.c
@@ -62,6 +62,7 @@ static inline void cache_lbmem(int type)
enable_cache();
}
+#if !defined(CONFIG_USE_DCACHE_RAM) || (CONFIG_USE_DCACHE_RAM == 0)
/* the fixed and variable MTTRs are power-up with random values,
* clear them to MTRR_TYPE_UNCACHEABLE for safty.
*/
@@ -118,6 +119,7 @@ static inline void early_mtrr_init(void)
do_early_mtrr_init(mtrr_msrs);
enable_cache();
}
+#endif
static inline int early_mtrr_init_detected(void)
{