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authorMario Scheithauer <mario.scheithauer@siemens.com>2018-11-06 12:19:35 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-07 16:47:36 +0000
commitf76acba3bfa8c216bc7deb09e39a9cd7ba4672c0 (patch)
tree5a1ed4096b06c813dbeef82a6225ca2d6f79db8a /src/cpu/x86
parent87f883959dee771d66e441e134111ba7b76b4ac5 (diff)
siemens/mc_apl3: Enable all PCIe root ports
Enable all PCIe root ports for this mainboard. Change-Id: I62c7ba5048b4c2288bb502a78b9621edda333f2a Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/29505 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/x86')
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