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authorDuncan Laurie <dlaurie@chromium.org>2012-06-23 15:22:43 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-24 23:49:28 +0200
commit51cb26d92a2ddac8d71fe0e5970ed208110add71 (patch)
treed64e41f2ff26f489a17f8f11d4ca3a23680b0658 /src/cpu/x86
parent181bbdd51cb4ec318e8b44c1ca652310bf6abb22 (diff)
SMM: Fix state save map for sandybridge and TSEG
There are enough differences that it is worth defining the proper map for the sandybridge/ivybridge CPUs. The state save map was not being addressed properly for TSEG and needs to use the right offset instead of pointing in ASEG. To do this properly add a required southbridge export to return the TSEG base and use that where appropriate. Change-Id: Idad153ed6c07d2633cb3d53eddd433a3df490834 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1309 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/smm/smihandler.c20
1 files changed, 15 insertions, 5 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index bbed0f195e..83ebaf9100 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -117,8 +117,14 @@ void smi_handler(u32 smm_revision)
{
unsigned int node;
smm_state_save_area_t state_save;
+ u32 smm_base = 0xa8000; /* ASEG */
-#if !CONFIG_SMM_TSEG
+#if CONFIG_SMM_TSEG
+ /* Update global variable TSEG base */
+ if (!smi_get_tseg_base())
+ return;
+ smm_base = smi_get_tseg_base() + 0x8000;
+#else
/* Are we ok to execute the handler? */
if (!smi_obtain_lock()) {
/* For security reasons we don't release the other CPUs
@@ -146,18 +152,22 @@ void smi_handler(u32 smm_revision)
case 0x00030007:
state_save.type = LEGACY;
state_save.legacy_state_save = (legacy_smm_state_save_area_t *)
- (0xa8000 + 0x7e00 - (node * 0x400));
+ (smm_base + 0x7e00 - (node * 0x400));
break;
case 0x00030100:
- case 0x00030101: /* SandyBridge */
state_save.type = EM64T;
state_save.em64t_state_save = (em64t_smm_state_save_area_t *)
- (0xa8000 + 0x7d00 - (node * 0x400));
+ (smm_base + 0x7d00 - (node * 0x400));
+ case 0x00030101: /* SandyBridge/IvyBridge */
+ state_save.type = EM64T101;
+ state_save.em64t101_state_save =
+ (em64t101_smm_state_save_area_t *)
+ (smm_base + 0x7d00 - (node * 0x400));
break;
case 0x00030064:
state_save.type = AMD64;
state_save.amd64_state_save = (amd64_smm_state_save_area_t *)
- (0xa8000 + 0x7e00 - (node * 0x400));
+ (smm_base + 0x7e00 - (node * 0x400));
break;
default:
printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_revision);