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authorNaresh G Solanki <naresh.solanki@intel.com>2017-04-20 16:45:01 +0530
committerMartin Roth <martinroth@google.com>2017-04-24 19:31:18 +0200
commit561f7fcf67c6c3442564bbff71276fe3a578b233 (patch)
treed3fd7ebb1b3deb0af18d3ff8ad873c2e5f19ee36 /src/cpu/x86/tsc
parentf8f682b024f7b9ff0a8c98147c45147d8266d55f (diff)
mb/google/fizz: Configure PCI root port
Configure PCI root port as per schematic. Change-Id: I10ef682e8c54e22f328db5105d4da39c72ac2bed Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/19390 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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