summaryrefslogtreecommitdiff
path: root/src/cpu/x86/smm
diff options
context:
space:
mode:
authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-21 03:31:02 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-27 11:27:51 +0100
commiteaab6305beb587777248bf46a894050ed2a76b78 (patch)
tree79de3d2d1e8eb82b432fcce7672b3f6cdea06a52 /src/cpu/x86/smm
parent12bb8f97b6e453ea2cc99607efb443025271f3d8 (diff)
cpu/amd/agesa/family15rl: Provide Richland CPU support
Richland - Microarchitecture: Piledriver Core stepping: RL-A1 CPUID: 610F31 Change-Id: I790085fbf36d836c903dcce77d794abb8578712b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7537 Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu/x86/smm')
-rw-r--r--src/cpu/x86/smm/smmhandler.S2
-rw-r--r--src/cpu/x86/smm/smmrelocate.S3
2 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/x86/smm/smmhandler.S b/src/cpu/x86/smm/smmhandler.S
index 484b643017..5d3aae3701 100644
--- a/src/cpu/x86/smm/smmhandler.S
+++ b/src/cpu/x86/smm/smmhandler.S
@@ -108,7 +108,7 @@ smm_handler_start:
/* This is an ugly hack, and we should find a way to read the CPU index
* without relying on the LAPIC ID.
*/
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN)
+#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) || IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_RL)
/* LAPIC IDs start from 0x10; map that to the proper core index */
subl $0x10, %ecx
#endif
diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index 6648215e22..21c638ee35 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -24,7 +24,8 @@
/* On AMD's platforms we can set SMBASE by writing an MSR */
#if !CONFIG_NORTHBRIDGE_AMD_AMDK8 && !CONFIG_NORTHBRIDGE_AMD_AMDFAM10 \
- && !CONFIG_CPU_AMD_AGESA_FAMILY15_TN
+ && !CONFIG_CPU_AMD_AGESA_FAMILY15_TN \
+ && !CONFIG_CPU_AMD_AGESA_FAMILY15_RL
// FIXME: Is this piece of code southbridge specific, or
// can it be cleaned up so this include is not required?