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authorArthur Heymans <arthur@aheymans.xyz>2019-11-07 08:18:14 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-22 10:48:11 +0000
commit1818733faa9af615bc1d9024dee10865aaf22da0 (patch)
tree9785ab9bddec3c7f6d8128ff4d4a5348913e0b10 /src/cpu/x86/smm
parent7f8b0cd89c10621f456e3eebcd290d3946122d6d (diff)
cpu/intel/smm: Drop em64t save state
This save state is just plainly wrong in many regards and em64t100 should be used. Checked with a model 0x17 core2 CPU. Change-Id: I4d89691e87c91dd12b34a44b74849b18b4ac5369 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36660 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/x86/smm')
-rw-r--r--src/cpu/x86/smm/smihandler.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 68b7859a04..20417d127e 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -18,7 +18,6 @@
#include <cpu/x86/smm.h>
#include <cpu/x86/smi_deprecated.h>
#include <cpu/amd/amd64_save_state.h>
-#include <cpu/intel/em64t_save_state.h>
#include <cpu/intel/em64t100_save_state.h>
#include <cpu/intel/em64t101_save_state.h>
#include <cpu/x86/legacy_save_state.h>
@@ -29,7 +28,7 @@
typedef enum {
AMD64,
- EM64T,
+ EM64T100,
EM64T101,
LEGACY
} save_state_type_t;
@@ -38,7 +37,7 @@ typedef struct {
save_state_type_t type;
union {
amd64_smm_state_save_area_t *amd64_state_save;
- em64t_smm_state_save_area_t *em64t_state_save;
+ em64t100_smm_state_save_area_t *em64t100_state_save;
em64t101_smm_state_save_area_t *em64t101_state_save;
legacy_smm_state_save_area_t *legacy_state_save;
};
@@ -178,10 +177,10 @@ void smi_handler(u32 smm_revision)
SMM_LEGACY_ARCH_OFFSET, node);
break;
case 0x00030100:
- state_save.type = EM64T;
- state_save.em64t_state_save =
+ state_save.type = EM64T100;
+ state_save.em64t100_state_save =
smm_save_state(smm_base,
- SMM_EM64T_ARCH_OFFSET, node);
+ SMM_EM64T100_ARCH_OFFSET, node);
break;
case 0x00030101: /* SandyBridge, IvyBridge, and Haswell */
state_save.type = EM64T101;