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author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2012-08-07 19:38:32 -0500 |
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committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2012-09-05 03:43:02 +0200 |
commit | e644bada0262b36605fdb992f449deece0ca0f9d (patch) | |
tree | 7fcba7bf5fc00a49d8370e8a064799310bf7cf67 /src/cpu/x86/smm | |
parent | 00b579a4478431dbfcef154ec80f5aa7d08d6529 (diff) |
VIA Nano: Add support for VIA Nano CPUs
Add code to do the following for the VIA Nano CPUs
- Update microcode
- Set maximum frequency
- Initialize power states
- Set up cache
Attempting to change the voltage or frequency of the CPU without
applying the microcode update will hang the CPU, so we only do
transitions if we can verify the microcode has been updated.
The microcode is updated directly from CBFS. No microcode is
included in ramstage. The microcode is not included in this
commit.
To get the microcode, run bios_extract on the manufacturer supplied
BIOS, and look for the file marked "P6 Microcode". Include this
file in CBFS.
You can have the build system include this file automatically by
selecting Expert Mode, then look under
'Chipset' -> 'Include CPU microcode in CBFS' ->
Include external microcode file (check)
'Path and filename of CPU microcode' should contain the location of
the microcode file previously extracted.
Change-Id: I586aaca5715e047b42ef901d66772ace0e6b655e
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/1257
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/x86/smm')
0 files changed, 0 insertions, 0 deletions