diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/cpu/x86/sipi_vector.S | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/cpu/x86/sipi_vector.S')
| -rw-r--r-- | src/cpu/x86/sipi_vector.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S index a7e4522943..11f0c2476a 100644 --- a/src/cpu/x86/sipi_vector.S +++ b/src/cpu/x86/sipi_vector.S @@ -172,7 +172,7 @@ microcode_done: test %ebx, %ebx jz 1f -#if IS_ENABLED(CONFIG_X86_AMD_FIXED_MTRRS) +#if CONFIG(X86_AMD_FIXED_MTRRS) /* Allow modification of RdDram and WrDram bits */ mov $SYSCFG_MSR, %ecx rdmsr @@ -189,7 +189,7 @@ load_msr: dec %ebx jnz load_msr -#if IS_ENABLED(CONFIG_X86_AMD_FIXED_MTRRS) +#if CONFIG(X86_AMD_FIXED_MTRRS) mov $SYSCFG_MSR, %ecx rdmsr and $~SYSCFG_MSR_MtrrFixDramModEn, %eax @@ -202,7 +202,7 @@ load_msr: and $~(CR0_CLEAR_FLAGS_CACHE_ENABLE), %eax mov %eax, %cr0 -#if IS_ENABLED(CONFIG_SSE) +#if CONFIG(SSE) /* Enable sse instructions. */ mov %cr4, %eax orl $(CR4_OSFXSR | CR4_OSXMMEXCPT), %eax |