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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-04-02 13:24:04 -0700 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2012-04-04 04:49:09 +0200 |
| commit | 3aa067f595115a62afdfc9acc33f08e9c96da850 (patch) | |
| tree | 1dad56c263c7f84d59440ec32654de76b78d6f2b /src/cpu/x86/pae | |
| parent | 6efbebdb58357b8d1aad43f51c91defd452296f6 (diff) | |
Add support to run SMM handler in TSEG instead of ASEG
Traditionally coreboot's SMM handler runs in ASEG (0xa0000),
"behind" the graphics memory. This approach has two issues:
- It limits the possible size of the SMM handler (and the
number of CPUs supported in a system)
- It's not considered a supported path anymore in newer CPUs.
Change-Id: I9f2877e46873ab2ea8f1157ead4bc644a50be19e
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Acked-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/842
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/x86/pae')
0 files changed, 0 insertions, 0 deletions