summaryrefslogtreecommitdiff
path: root/src/cpu/x86/name
diff options
context:
space:
mode:
authorStefan Reinauer <reinauer@chromium.org>2012-04-03 16:24:37 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-06 02:13:27 +0200
commitc00dfbc1c8358c1896e70fe147865dab370a5280 (patch)
treedb6c321fcabe36cd5e7005ff7bb3a8674d8f6625 /src/cpu/x86/name
parent6293d307684215a040bef54f1fb8479bfec0755c (diff)
Cache 8MB flash instead of 4MB
Also fix the MTRR check to use the total_mtrrs variable instead of a hardcoded 8. Change-Id: I2c5ceb3910cd949f43ecf5b8aff857d6ffe0b1a5 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: http://review.coreboot.org/873 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/x86/name')
0 files changed, 0 insertions, 0 deletions