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authorArthur Heymans <arthur@aheymans.xyz>2022-11-10 13:34:49 +0100
committerArthur Heymans <arthur@aheymans.xyz>2022-11-12 14:23:51 +0000
commitd4dfc21f70616bc97191969aa2b6d0196a525fce (patch)
tree7c4944b9f923710316df04bfa06f97005c9ca03b /src/cpu/x86/mp_init.c
parent407e00dca06e36d2d9b11f998a278109ff330783 (diff)
cpu/x86: Set thread local storage in C code
Doing this in C code is way easier to understand. Also the thread local storage is now in .bss instead of the AP stack. This makes it more robust against stack overflows, as APs stacks overflow in each other. TESTED: work on qemu. Change-Id: I19d3285daf97798a2d28408b5601ad991e29e718 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69435 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86/mp_init.c')
-rw-r--r--src/cpu/x86/mp_init.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index 0e4a571e96..758550c43d 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -176,20 +176,19 @@ static struct bus *g_cpu_bus;
/* By the time APs call ap_init() caching has been setup, and microcode has
* been loaded. */
-static void asmlinkage ap_init(void)
+static asmlinkage void ap_init(unsigned int index)
{
- struct cpu_info *info = cpu_info();
-
/* Ensure the local APIC is enabled */
enable_lapic();
setup_lapic_interrupts();
struct device *dev = g_cpu_bus->children;
- for (unsigned int i = info->index; i > 0; i--)
+ for (unsigned int i = index; i > 0; i--)
dev = dev->sibling;
- info->cpu = dev;
+ set_cpu_info(index, dev);
+ struct cpu_info *info = cpu_info();
cpu_add_map_entry(info->index);
/* Fix up APIC id with reality. */
@@ -540,6 +539,7 @@ static enum cb_err init_bsp(struct bus *cpu_bus)
}
/* Find the device structure for the boot CPU. */
+ set_cpu_info(0, bsp);
info = cpu_info();
info->cpu = bsp;
info->cpu->name = processor_name;