diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
| commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
| tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/cpu/x86/lapic | |
| parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) | |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/lapic')
| -rw-r--r-- | src/cpu/x86/lapic/lapic.c | 28 | ||||
| -rw-r--r-- | src/cpu/x86/lapic/secondary.S | 2 |
2 files changed, 15 insertions, 15 deletions
diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c index 555d74eecc..c8f83b0dd0 100644 --- a/src/cpu/x86/lapic/lapic.c +++ b/src/cpu/x86/lapic/lapic.c @@ -5,11 +5,11 @@ void setup_lapic(void) { - /* this is so interrupts work. This is very limited scope -- + /* this is so interrupts work. This is very limited scope -- * linux will do better later, we hope ... */ - /* this is the first way we learned to do it. It fails on real SMP - * stuff. So we have to do things differently ... + /* this is the first way we learned to do it. It fails on real SMP + * stuff. So we have to do things differently ... * see the Intel mp1.4 spec, page A-3 */ @@ -33,25 +33,25 @@ void setup_lapic(void) lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK); /* Put the local apic in virtual wire mode */ - lapic_write_around(LAPIC_SPIV, + lapic_write_around(LAPIC_SPIV, (lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK)) | LAPIC_SPIV_ENABLE); - lapic_write_around(LAPIC_LVT0, - (lapic_read_around(LAPIC_LVT0) & - ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | - LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | + lapic_write_around(LAPIC_LVT0, + (lapic_read_around(LAPIC_LVT0) & + ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | + LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 | LAPIC_DELIVERY_MODE_MASK)) - | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | + | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | LAPIC_DELIVERY_MODE_EXTINT) ); - lapic_write_around(LAPIC_LVT1, - (lapic_read_around(LAPIC_LVT1) & - ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | - LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | + lapic_write_around(LAPIC_LVT1, + (lapic_read_around(LAPIC_LVT1) & + ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | + LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 | LAPIC_DELIVERY_MODE_MASK)) - | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | + | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | LAPIC_DELIVERY_MODE_NMI) ); diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S index dafc9a561c..5c1e7607e8 100644 --- a/src/cpu/x86/lapic/secondary.S +++ b/src/cpu/x86/lapic/secondary.S @@ -26,7 +26,7 @@ _secondary_start: movl %eax, %cr0 ljmpl $0x10, $1f -1: +1: .code32 movw $0x18, %ax movw %ax, %ds |