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authorYinghai Lu <yinghailu@gmail.com>2006-10-04 20:46:15 +0000
committerYinghai Lu <yinghailu@gmail.com>2006-10-04 20:46:15 +0000
commitd4b278c02c1da92219ebeb34204b9768934aeca3 (patch)
tree488d097cac9744cfc9b8ff7c89ce69bcb21370cb /src/cpu/x86/lapic
parent2e3757d11c565a8fe68dc2a2c34975e98304533c (diff)
AMD Rev F support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/x86/lapic')
-rw-r--r--src/cpu/x86/lapic/lapic.c2
-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c11
2 files changed, 9 insertions, 4 deletions
diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index 8282890bf7..8c111e8d71 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -55,7 +55,7 @@ void setup_lapic(void)
LAPIC_DELIVERY_MODE_NMI)
);
- printk_debug(" apic_id: %d ", lapicid());
+ printk_debug(" apic_id: 0x%02x ", lapicid());
#else /* !NEED_LLAPIC */
/* Only Pentium Pro and later have those MSR stuff */
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 4b5acad2c4..1adafc8d18 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -322,7 +322,7 @@ static void start_other_cpus(struct bus *cpu_bus, device_t bsp_cpu)
if (!start_cpu(cpu)) {
/* Record the error in cpu? */
- printk_err("CPU %u would not start!\n",
+ printk_err("CPU 0x%02x would not start!\n",
cpu->path.u.apic.apic_id);
}
#if SERIAL_CPU_INIT == 1
@@ -354,7 +354,7 @@ static void wait_other_cpus_stop(struct bus *cpu_bus)
continue;
}
if (!cpu->initialized) {
- printk_err("CPU %u did not initialize!\n",
+ printk_err("CPU 0x%02x did not initialize!\n",
cpu->path.u.apic.apic_id);
#warning "FIXME do I need a mainboard_cpu_fixup function?"
}
@@ -366,6 +366,10 @@ static void wait_other_cpus_stop(struct bus *cpu_bus)
#define initialize_other_cpus(root) do {} while(0)
#endif /* CONFIG_SMP */
+#if WAIT_BEFORE_CPUS_INIT==0
+ #define cpus_ready_for_init() do {} while(0)
+#endif
+
void initialize_cpus(struct bus *cpu_bus)
{
struct device_path cpu_path;
@@ -394,6 +398,8 @@ void initialize_cpus(struct bus *cpu_bus)
copy_secondary_start_to_1m_below(); // why here? In case some day we can start core1 in amd_sibling_init
#endif
+ cpus_ready_for_init();
+
#if CONFIG_SMP == 1
#if SERIAL_CPU_INIT == 0
/* start all aps at first, so we can init ECC all together */
@@ -407,7 +413,6 @@ void initialize_cpus(struct bus *cpu_bus)
#if CONFIG_SMP == 1
#if SERIAL_CPU_INIT == 1
- /* start all aps */
start_other_cpus(cpu_bus, info->cpu);
#endif