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authorMichael Niewöhner <foss@mniewoehner.de>2019-09-01 16:49:09 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-23 20:39:44 +0000
commit7bdedcdc338e5043f9670790a4333260b63087aa (patch)
tree2a02bc0ddbf636f58c785ae64705cf675e6e2701 /src/cpu/x86/lapic
parent88e9c5af574130483de24cdc1e2328e0dd622793 (diff)
soc/intel/skylake: lock AES-NI MSR
Lock AES-NI register to prevent unintended disabling, as suggested by the MSR datasheet. Successfully tested by reading the MSR on X11SSM-F Change-Id: I97a0d3b1b9b0452e929ca07d29c03237b413e521 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35188 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/x86/lapic')
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