cpu/x86/lapic: Do not inline some utility functions

They are not __always_inline and specially enable_lapic()
will become more complex to support X2APIC state changes.

Change-Id: Ic180fa8b36e419aba07e1754d4bf48c9dfddb2f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55258
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 36 insertions, 1 deletions

diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index 468a5dc256..9f3cff5834 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -1,10 +1,37 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <cpu/x86/lapic.h>
+#include <cpu/x86/lapic_def.h>
+#include <cpu/x86/msr.h>
 #include <console/console.h>
 #include <stdint.h>
 
-void lapic_virtual_wire_mode_init(void)
+void enable_lapic(void)
+{
+	msr_t msr;
+	msr = rdmsr(LAPIC_BASE_MSR);
+	msr.hi &= 0xffffff00;
+	msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
+	msr.lo |= LAPIC_DEFAULT_BASE;
+	msr.lo |= LAPIC_BASE_MSR_ENABLE;
+	wrmsr(LAPIC_BASE_MSR, msr);
+}
+
+void disable_lapic(void)
+{
+	msr_t msr;
+	msr = rdmsr(LAPIC_BASE_MSR);
+	msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
+	wrmsr(LAPIC_BASE_MSR, msr);
+}
+
+/* See if I need to initialize the local APIC */
+static int need_lapic_init(void)
+{
+	return CONFIG(SMP) || CONFIG(IOAPIC);
+}
+
+static void lapic_virtual_wire_mode_init(void)
 {
 	/* this is so interrupts work. This is very limited scope --
 	 * linux will do better later, we hope ...
@@ -40,3 +67,11 @@ void lapic_virtual_wire_mode_init(void)
 	printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid());
 	printk(BIOS_INFO, "done.\n");
 }
+
+void setup_lapic(void)
+{
+	if (need_lapic_init())
+		lapic_virtual_wire_mode_init();
+	else
+		disable_lapic();
+}